Intel IDF Preview

Intel gave some new information to the press about Tukwila, Dunnington, Nehalem and Larrabee this morning and we present that for you all to see. We of course include some of our commentary on the subjects as well.
Today Intel sat down with some of the press to preview the information and technology that will be showcased and demonstrated at the Intel Developer Forum in Shanghai next month.  Topic discussed were server products like Tukwila and Dunnington but the really juicy details came from the Nehalem platform and the upcoming discrete graphics chip, Larrabee.

We have included the entire slide deck that Intel provided us as well as a healthy dose of commentary and information that was discussed but not shown on the slides.

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With both Itanium for HPC servers and Larrabee for graphics coming in the near future, Intel is pushing their IA design across everything from smart phones on up.  AMD has consistently been a proponent of “x86 everywhere” and now it seems Intel is following that stance as well in its entirety. 

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The Tukwila core from Intel is the replacement for the Itanium line of products and will feature an astounding 2 Billion transistors with 30MB of cache.  Obviously a large majority of those transistors are in form of the large cache.  It will be built on the current 65nm process technology as well meaning that this will be a LARGE chip but Intel claims it will still fit into a 130 watt TDP.

It is interesting to note that this is the first place we see the application of the new Intel high speed interconnect, QuickPath as well as integrated memory controller.  Tukwila seems have much in common with the upcoming Nehalem architecture. 

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News of the upcoming 6-core processor know as Dunnington first hit us courtesy of a leaked Sun Microsystems presentation and was confirmed by Intel today during the briefing.  The chip will sport nearly as many transistors as the Tukwila chip though it features much less cache.

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Dunnington up close

It also introduces the first L3 cache being used by an Intel product coming in at 16MB and will theoretically be used for intra-chip communications and data sharing primarily.  It is being built on the 45nm process that is starting to ramp up across the company and should be available later this year for Xeon customers. 

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A new SPECpower benchmark was shown for the first time at the briefing that will attempt to bring a new standard to the way power efficiency is measured for processing.  We were assigned “homework” from Intel in that we ought to learn all about this new benchmark and study it potential uses.  Of course, seeing as Intel has the top 10 spots on it, they definitely are finding it useful.



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