The Register has a look at AMD’s roadmap for the upcoming year, and spots things like L3 cache, DDR2 and and Pacifica.
“Hester also pointed to chipsets containing L3 cache, which also harks back to Ruiz’ April prognostications – he too hinted AMD might one day return to the chipset market. AMD has “shared L3” down on its roadmap for 2007, alongside further extensions to the AMD64 instruction set – or extensions to the extensions to the x86 instruction set, as we guess they’ll be. Further out, the company claims, expect to see its Direct Connect Architecture 2.0 in 2008, along with “greater than eight-way computing”. Hester said the quadies will scale up to 32 sockets.”

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