AMD Announces EPYC: A Massive 32-Core Datacenter SoC

Subject: Processors | May 16, 2017 - 06:49 PM |
Tagged: Zen, server, ryzen, processor, EPYC, datacenter, cpu, amd, 64 thread, 32 core

AMD has announced their new datacenter CPU built on the Zen architecture, which the company is calling EPYC. And epic they are, as these server processors will be offered with up to 32 cores and 64 threads, 8 memory channels, and 128 PCI Express lanes per CPU.

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Some of the details about the upcoming "Naples" server processors (now EPYC) were revealed by AMD back in March, when the upcoming server chips were previewed:

"Naples" features:

  • A highly scalable, 32-core System on Chip (SoC) design, with support for two high-performance threads per core
  • Industry-leading memory bandwidth, with 8-channels of memory per "Naples" device. In a 2-socket server, support for up to 32 DIMMS of DDR4 on 16 memory channels, delivering up to 4 terabytes of total memory capacity.
  • The processor is a complete SoC with fully integrated, high-speed I/O supporting 128 lanes of PCIe, negating the need for a separate chip-set
  • A highly-optimized cache structure for high-performance, energy efficient compute
  • AMD Infinity Fabric coherent interconnect for two "Naples" CPUs in a 2-socket system
  • Dedicated security hardware 

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Compared to Ryzen (or should it be RYZEN?), EPYC offers a huge jump in core count and available performance - though AMD's other CPU announcement (Threadripper) bridges the gap between the desktop and datacenter offerings with an HEDT product. This also serves to bring AMD's CPU offerings to parity with the Intel product stack with desktop/high performance desktop/server CPUs.

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EPYC is a large processor. (Image credit: The Tech Report)

While specifications were not offered, there have been leaks (of course) to help fill in the blanks. Wccftech offers these specs for EPYC (on the left):

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(Image credit: Wccftech)

We await further information from AMD about the EPYC launch.

Source: AMD

May 17, 2017 | 05:07 AM - Posted by djotter

Wow, that is a huge package, as big as Lisa's palm. I thought there was some lithography limitation that meant processors couldn't be that big? Or is it some interposer trickery?

May 17, 2017 | 09:01 AM - Posted by LazarusIV

It looks like, from some of the other pictures in the presentation, EPYC is made up of 4 Ryzen CCXs (each with 8 cores / 16 threads) connected via infinity fabric. I have no need for something this ridiculous but Holy Mother of Jesus I want 3!

May 17, 2017 | 09:35 AM - Posted by funandjam

sadly, I am envious because my package size is much smaller.

May 17, 2017 | 11:34 AM - Posted by psuedonymous

Looks similarly chunky to the upcoming (unless you have Xeon Phi) LGA3647. We've heard plenty on the low-end small-core Xeons (intended for LGA2066), but the insides of the bigger Xeons (what were the E5-2xxx and E7-xxxx series before the silly rebranding) has remained fairly quiet.

May 17, 2017 | 11:34 AM - Posted by psuedonymous

To add: Xeon Phi is already a design based on an interposer, though not a silicon interposer, to accommodate the HMC chips.