LinkedIn Posts Hint at Radeon R9 380X Features, Stacked Memory

Subject: Graphics Cards | January 13, 2015 - 12:22 PM |
Tagged: rumor, radeon, r9 380x, 380x

Spotted over at TechReport.com this morning and sourced from a post at 3dcenter.org, it appears that some additional information about the future Radeon R9 380X is starting to leak out through AMD employee LinkedIn pages.

Ilana Shternshain is a ASIC physical design engineer at AMD with more than 18 years of experience, 7-8 years of that with AMD. Under the background section is the line "Backend engineer and team leader at Intel and AMD, responsible for taping out state of the art products like Intel Pentium Processor with MMX technology and AMD R9 290X and 380X GPUs." A bit further down is an experience listing of the Playstation 4 APU as well as "AMD R9 380X GPUs (largest in “King of the hill” line of products)."

Interesting - though not entirely enlightening. More interesting were the details found on Linglan Zhang's LinkedIn page (since removed):

Developed the world’s first 300W 2.5D discrete GPU SOC using stacked die High Bandwidth Memory and silicon interposer.

Now we have something to work with! A 300 watt TDP would make the R9 380X more power hungry than the current R9 290X Hawaii GPU. High bandwidth memory likely implies memory located on the substrate of the GPU itself, similar to what exists on the Xbox One APU, though configurations could differ in considerable ways. A bit of research on the silicon interposer reveals it as an implementation method for 2.5D chips:

View Full Size

Source: SemiWiki.com

There are two classes of true 3D chips which are being developed today. The first is known as 2½D where a so-called silicon interposer is created. The interposer does not contain any active transistors, only interconnect (and perhaps decoupling capacitors), thus avoiding the issue of threshold shift mentioned above. The chips are attached to the interposer by flipping them so that the active chips do not require any TSVs to be created. True 3D chips have TSVs going through active chips and, in the future, have potential to be stacked several die high (first for low-power memories where the heat and power distribution issues are less critical).

An interposer would allow the GPU and stacked die memory to be built on different process technology, for example, but could also make the chips more fragile during final assembly. Obviously there a lot more questions than answers based on these rumors sourced from LinkedIn, but it's interesting to attempt to gauge where AMD is headed in its continued quest to take back market share from NVIDIA.

Source: 3dcenter.org

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January 13, 2015 | 12:41 PM - Posted by Daniel Nielsen (not verified)

Hey i like my 290x, but i dont like the idea of a 390x being even more power hungry. That kind of puts a dent in me waiting for a 390x to replace the 290x. If true that is.

January 13, 2015 | 01:17 PM - Posted by Anonymous (not verified)

a lot of flagship graphic card users have watercooling, so high TDP isn't a problem.

January 13, 2015 | 02:40 PM - Posted by fade2blac

"A lot...have watercooling" Based on what information? What percentage of R9 290/X users have their cards under water? I would guess this is easily in the single digit percentages.

Rumors are that the new reference designs may include a hybrid water cooler such as was seen on the R9 295X2. Until then, I don't think one can throw watercooling out there as a "common" configuration. When/if watercooling does become common, then it introduces the need to mount a radiator and route tubing which is yet another potential 'problem' for consumers to consider.

Also, don't forget that PSU requirements are non-trivial as well. A 300W spec would mandate at least one eight-pin PCI-E connector (150W) + one six-pin PCI-E connector (75W) in addition to the 75W provided by the PCI-E slot. It is not uncommon for high end cards to draw a fraction of the 75W available from the PCI-E slot and instead rely almost exclusively on the PCI-E auxiliary power connections. Therefore, a dual 8-pin PCI-E connector arrangement would be likely, especially in non-reference designs.

January 14, 2015 | 02:29 AM - Posted by renz (not verified)

i see some people said water cooling (like the one used in 295x2) should be a norm on high end card and hope both AMD and nvidia will adopt them on their reference design (and so will AIB). personally i don't like that idea. i'm fine with such cooler being an option but i don't like it being forced on me. imagine if you already have AIO cooler for your CPU. then come another card with it's own radiator. even a single card will might make it complicated for your case. then extend that to 2 way or 3 way with such card.

January 13, 2015 | 10:22 PM - Posted by Anonymous (not verified)

If they can make a reasonably quiete cooling solution, then I don't think I care that much about the power consumption. I don't game 24/7 so I don't think the difference in electric bill will be that significant.

January 14, 2015 | 12:26 PM - Posted by nathanddrews

I agree. I don't care if it consumes 500W and can fry an egg from two feet away as long as it's affordable and gives me those frames.

January 15, 2015 | 06:24 PM - Posted by Anonymous (not verified)

If it consumes 500W (I don't think PCI-E slots can handle that TDP anyway) it better be beating SLI configs not just 1 card lol. If rumors are true I'll probably even skip it at 300W unless I go single GPU.

January 13, 2015 | 12:41 PM - Posted by Daniel Nielsen (not verified)

Hey i like my 290x, but i dont like the idea of a 390x being even more power hungry. That kind of puts a dent in me waiting for a 390x to replace the 290x. If true that is.

January 13, 2015 | 01:44 PM - Posted by Anonymous (not verified)

What is the significance of stacked memory?

January 13, 2015 | 02:10 PM - Posted by fade2blac

Basically this is to implement some form of High Bandwidth Memory (HBM) which allows for dramatic improvements in overall memory bandwidth and power efficiency by using an extremely wide but slower clocked memory interconnects.

According to JDEC:
"To meet industry demands for increased levels of integration as well as improved performance, bandwidth, latency, power, weight and form factor, microelectronics manufacturers are implementing three dimensional (3D) chip stacking utilizing Through Silicon Via (TSV) chip to chip interconnects."

"The HBM DRAM is tightly coupled to the host compute die with a distributed interface. The interface is divided into independent channels. Each channel is completely independent of one another. Channels are not necessarily synchronous to each other. The HBM DRAM uses a wide-interface architecture to achieve high-speed, low-power operation."

It may be that there are potentially significant limitations/differences with use of 2.5D (interposer) vs. 3D (TSV) designs. The most obvious would be the ability to mix process technologies. This would allow the ASIC to be fabbed on the latest high performance nodes while memory chips could be made on a lower power or lower cost alternative that is good enough to meet the design requirements of an HBM interface.

January 13, 2015 | 10:50 PM - Posted by Anonymous (not verified)

Are they going for that much lower clock? Going through a transposer allows for much shorter interconnects so I would expect lower power even at similar clocks. The memory isn't stacked on top of the logic chip unfortunately, but still could be very close and a large number of solder bumps can be used.

January 14, 2015 | 04:41 PM - Posted by fade2blac

http://www.i-micronews.com/advanced-packaging-news/36-sk-hynix-readying-...

http://www.memcon.com/pdfs/proceedings2014/NET104.pdf

According to info such as found through the links above, base clock rates may be only 500 MHz, or 1GHz effective DDR.

An interesting reference to the size and potential form factors is "1GB HBM package size is smaller than 1 tablet of aspirin". I imagine GPU's with 4 or 8GB of RAM should be relatively compact, but a high TDP will still require large cooling solutions.

Pages 18 and 19 of the SK Hynix PDF provide some nice diagrams to better view the physical interconnects and layout of the whole package. "HBM 2.5D SiP Structure" actually consists of stacked memory dies connected using TSVs and then the stacked dies use the interposer as a bridge to the SoC/ASIC die. This whole assembly is mounted to a shared package substrate.

January 14, 2015 | 04:39 PM - Posted by fade2blac

*double post

January 13, 2015 | 02:23 PM - Posted by Maff

After also reading this news on multiple other techsites, I still don't understand why everyone concludes that it is also the 380X the 2nd engineer is talking about. Why couldn't he be working on a 2,5D version of the 390X instead? the wattage certainly seems to suggest something in that direction.

January 13, 2015 | 10:07 PM - Posted by Anonymous (not verified)

I would be surprised to see stacked memory on the upcoming generation. They may use it more as a cache first rather than relying on it as the only memory. I don't think they will put 4 or 8 GB of stacked memory right from the start. You can get by with a smaller amount of memory currently, but with current consoles having such a large amount of memory available, it may avoid a lot of problems to have at least 4 GB.

January 14, 2015 | 11:11 AM - Posted by Jabbadap (not verified)

Afaik available hbm ram from hynix is 1GB 128GB/s:
https://www.skhynix.com/inc/pdfDownload.jsp?path=/datasheet/Databook/Dat...

Upcoming chip will most likely have them four as 4GB memory with memory bandwidth of 512GB/s(r9-290x 320GB/s and GTX780Ti 336GB/s). I'm not certain how it goes with hbm:s, but I guess you must have higher density rams to get more vram. So If there will be 8GB version, you have to get 2GB hbm rams first.

January 17, 2015 | 07:06 PM - Posted by Anonymous (not verified)

It will be great if they can get that much memory in a single package. I have a 2560x1600 screen and I would not mind upgrading to 4k or more. If I buy a higher end video card, I want it to have at least 4 GB. I don't need greater than 2560x1600 for images (Dell U3011 looks beautiful for images), but I have found the DPI to be a bit low for text since I have gotten used to high DPI screens on tablets and phones.

January 17, 2015 | 07:06 PM - Posted by Anonymous (not verified)

It will be great if they can get that much memory in a single package. I have a 2560x1600 screen and I would not mind upgrading to 4k or more. If I buy a higher end video card, I want it to have at least 4 GB. I don't need greater than 2560x1600 for images (Dell U3011 looks beautiful for images), but I have found the DPI to be a bit low for text since I have gotten used to high DPI screens on tablets and phones.

January 13, 2015 | 06:06 PM - Posted by mAxius

Hynix has been working with amd on this for years...

lets just say gddr is dead. HBM offers an insane amount of bandwith with less power draw and can be stacked on the same pcb as the apu/gpu/cpu.

"HBM is another emerging memory standard defined by the JEDEC organization. HBM was developed as a revolutionary upgrade for graphics applications. GDDR5 was defined to support 28 GBps (7 Gbps x32). Expected to be available in mass production in 2015, the standard applies to stacked DRAM die, and is built on Wide I/O and TSV technologies to support bandwidth from 128GB/s to 256GB/s. JEDEC’s HBM task force is now part of the JC-42.3 Subcommittee, which continues to work to define support for up to 8-high TSV stacks of memory on a 1,024-bits wide data interface. The subcommittee expects to publish the standard late 2013."

http://wccftech.com/amd-working-hynix-development-highbandwidth-3d-stack...

Further reading google amd hynix HBM :D

January 13, 2015 | 09:58 PM - Posted by Anonymous (not verified)

Aren't Micron and Intel working on stacked memory also? Nvidia plans seem to include on package memory with their mezzanine connector utilizing nvlink, but I am not sure who will be making their memory (Hynix also maybe?).

January 14, 2015 | 09:06 AM - Posted by Anonymous (not verified)

So there was no official 390x info at CES? Poor sign of a release by mid year? I was hoping to get more info as i was set to hit my next upgrade spurt this mid year

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