An academic collaboration leads to a GPU/CPU collaboration
Subject: General Tech | February 8, 2012 - 05:13 PM | Jeremy Hellstrom
Tagged: gpgpu, l3 cache, APU
Over at North Carolina State University, students Yi Yang, Ping Xiang and Dr. Huiyang Zhou, along with Mike Mantor of Advanced Micro Devices have been working on a way to improve how efficiently the GPU and CPU work together. Our current generations of APU/GPGPUs, Llano and Sandy Bridge, have united the two processing units on a single substrate but as of yet they cannot efficiently pass operations back and forth. This project works to leverage the L3 cache of the CPU to give a high speed bridge between the two processors, allowing the CPU to pass highly parallel tasks to the GPU for more efficient processing and letting the CPU deal with the complex operations it was designed for.
Along with that bridge comes a change in the way the L2 prefetch is utilized; increasing memory access at that level frees up more for the L3 to pass data between CPU and GPU thanks to a specially designed preexecution unit triggered by the GPU and running on the CPU which will enable synchronized memory fetch instructions. The result has been impressive, in their tests they saw an average improvement of 21.4% in performance.
"Researchers from North Carolina State University have developed a new technique that allows graphics processing units (GPUs) and central processing units (CPUs) on a single chip to collaborate – boosting processor performance by an average of more than 20 percent.
"Chip manufacturers are now creating processors that have a 'fused architecture,' meaning that they include CPUs and GPUs on a single chip,” says Dr. Huiyang Zhou, an associate professor of electrical and computer engineering who co-authored a paper on the research. "This approach decreases manufacturing costs and makes computers more energy efficient. However, the CPU cores and GPU cores still work almost exclusively on separate functions. They rarely collaborate to execute any given program, so they aren’t as efficient as they could be. That's the issue we’re trying to resolve."
Here is some more Tech News from around the web:
- Laser boffins blast bits onto hard drive at 200Gb/sec @ The Register
- Intel admits Haswell uses transactional memory @ SemiAccurate
- Nvidia and Rambus bury the hatchet on patents @ The Inquirer
- Don't panic? Windows 8 and the "ribbonification" of Explorer @ Ars Technica
- DIY Solid State Tesla Coil @ Hack a Day
- Brice from Arctic reveals all in exclusive @ Kitguru
- Instructables Giving Away $50,000 3D Printer @ MAKE:Blog