USB-IF Publishes USB 3.2 Specification Rated At 20 Gbps With Multi-Lane Operation

Subject: General Tech | October 3, 2017 - 12:00 AM |
Tagged: usb 3.2, usb-if, USB 3 Type-C, type c, usb

The USB Implementers Forum recently published and made official the specifications for the USB 3.2 standard first introduced in near-final form by the USB 3.0 Promoters Group back in July. The USB 3.2 standard specifies the physical and logical techniques for transferring data over physical USB cables (which are now all specified under their own standards decoupled from the USB 3.2 data transfer specifications) at up to 20 Gbps (~2 GB/s) using two 10 Gbps channels and the same signaling and 128b/132b encoding used by USB 3.1.

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Like Thunderbolt, USB 3.2 takes advantage of multiple lanes to achieve the total bandwidth rather than trying to clock and run a single channel at twice the speed which is incredibly complex. In the case of USB 3.2, the specification defines two channels that can run 2 x 5 Gbps or 2 x 10 Gbps depending on the cable used with USB 3.1 Gen 1 (5 Gbps) or USB 3.1 Gen 2 (10 Gbps) cables respectively. In fact, users will be able to re-use their existing USB Type C cables to connect USB 3.2 hosts to USB 3.2 devices so long as they are up to spec. The USB-IF is able to achieve this by using the extra wire pairs in the Type C cables to enable the two lane operation. (5 Gbs cables would be upgraded to 10 Gbps speeds and 10 Gbps cables would be upgraded to 20 Gbps speeds when used with 3.2 hardware at both ends.)

The specification is expected to be finalized by the end of the year with USB 3.2 controllers and other hardware to begin production and roll outs in 2018. Devices supporting the faster USB 3.2 standard are expected as soon as 2019. Desktop users should get access first in the form of PCI-E add-on cards with new USB 3.2 controllers from third parties with native CPU and chipset support from AMD and Intel following in a generation or two (processor generation that is). Laptop and mobile users will have to wait until at least 2019 if not later for the faster standard to come standard.

It is interesting that they have decoupled the USB data transfer standard from the physical cable standards. It seems that USB Type C cables are the star of the show, but that cables like Type A and Micro cables are not going away and could be used with USB 3.2 with the caveat that you would need to buy new USB 3.2 cables which should be backwards compatible with older USB standards but current cables (SuperSpeed Type C cables being the exception) aren't forwards compatible--they might work but will support the higher speeds. At least that is my understanding of it. I am curious if Type C will be more prevalent with USB 3.2 or if we will still see motherboards with a single USB Type C nestled among many more Type A ports. I suppose the number of Type C vs Type A ports will all depend on how many new devices adopt Type C as the USB 3.2 physical interface of choice though, something we will just have to wait and see on! It is nice to see some competition for Thunderbolt though even at 20 Gbps USB 3.2 still lags behind the 40 Gbps of Thunderbolt 3 (20 Gbps with passive copper cables) which Intel is allegedly planning to make royalty free next year. USB 3.2 also has more overhead and is less ideal for things like external graphics. On the other hand, it may just be the cheap enough and fast enough connector that will get the design wins while Thunderbolt continues to be more of a prosumer and professional interface for the higher end and expensive motherboards, PCs, and end devices.

If you are interested in the new 20 Gbps USB 3.2 specifications, the USB-IF has provided a 103 MB zip file with several documents including a 548 page PDF of the new standard and a redline comparison between it and USB 3.1 among other related documents for developers.

Source: USB-IF

October 3, 2017 | 06:38 AM - Posted by willmore

Twice the bandwidth and no new cables? Seems like a good idea.

October 4, 2017 | 12:37 PM - Posted by TheFixIsInOnLappy (not verified)

If the cables you purchased actually follow the USB-IF's USB Type-C standard then yes. But what if the cables do not follow that USB-IF standard and some extra wires are not provided in the cable then things may not work so well. So maybe it's time to break out the testers and see.

Then there are the laptop OEMs that may have all the ports sharing the same PCIe lane/s' bandwidth allotment and those things are never tested on laptops thoroughly. So the total theoretical bandwidth of any USB 3.1(Gen 2) or USB 3.2(dual USB 3.1 gen 2) controllers may not be provided for if other ports are being used also. All those ports sharing some limited number of PCIe lanes that are used for Chipset provided USB bandwidth on laptops needs to be researched or total bandwidth needs stated by the USB-IF standards may not be met. And laptop OEMs doing things on the cheap and not backing up the USB/whatever controllers with enough available PCIe bandwidth for any peak usage across more than one USB port at the same time.

Also owing to the fact that most laptop "Reviews" are of the sponsored variety and any deep down digging will result in lost ad revenuse and/or no review samples for not following the review manual. So it's not very clear for most laptops what your box of chocolates experience may be.

October 3, 2017 | 09:13 AM - Posted by psuedonymous

Multi-lane transport? Neat... where's that Eurobeat coming from?

October 3, 2017 | 11:52 PM - Posted by LegoGuy23

Hmm... Now we know where the USB Consortium gets their inspiration!
https://youtu.be/hljPsNpo9y4?t=49

October 3, 2017 | 09:43 AM - Posted by Ven (not verified)

Wait, so the Universal Serial Bus now operates in a parallel mode?

Maybe USB4 will add more pins so that it can run even more channels, then in a few years we could see the resurrection of the DB-25 port!

October 3, 2017 | 11:05 AM - Posted by willmore

No, it's not parallel. It's serial. Just like PCI-E. You can have many lanes of data all independently serial which get recombined at a higher level.

The important difference is that these links are independently clocked--they're actually self clocking. Parallel links share a clocking signal and suffer from skew at high speeds.

October 3, 2017 | 11:41 AM - Posted by WayBackOnThePCIeLanes (not verified)

No it's just 2 serial 3.1 channels link aggregated so it's still not parallel where bits are clocked in sync across 2, or more, wires using the same clock domain. But really on laptops will there ever be enough PCIe lanes made available to give USB 3.2's 2, 3.1 serial channels' that total 20Gbs of actual bandwidth. Laptop OEMs are not really adopting USB 3.1 10Gbs yet, and a lot of those USB ports on laptops are sharing the same bandwidth on the same root-HUB so maybe PCIe 4.0 needs to be adopted by the laptop market ASAP. But we all Know that the Laptop makers will not adopt most things until the CPU makers include that on their provided motherboard chip-sets as Laptop OEM's are always on the cheep when in comes to any latest connection technology adoption.

So AMD and Intel will have to get that USB 3.2 support into their chip-sets and that should not be too hard as USB 3.2 is just a Dual USB 3.1 controller with some extra command logic so that's not going to be too difficult. The hard part is getting the laptop OEMs to provide enough PCIe connectivity that's not all shared between all the laptops's various USB ports in the first place and Laptop Motherboards are mostly custom OEM creations done on the cheep to keep costs low because margins are razor thin on laptops.

Now if Intel could create a TB 3.1 and provide dual 40Gbs TB3 lanes(no bandwidth sharing) but that's going to require some more PCIe 3.0 lanes also.

For any PC/Laptop devices' ports that are all leading to some controllers of many types there is the PCIe lanes that wire the controllers via PCIe lanes to the processor or PCIe lanes to the chipset and then to the processor and the numbers of available PCIe lanes on any laptop motherboards are not going to be as plentiful as the PC motherboards offer.

And while there are many laptop OEM's offering USB Type-C ports those ports are still wired into the USB 3.1 Gen1(USB 3.0 controllers). So Laptop OEM are mostly wanting the USB Type-C electrical standard's power features and thinner Type-C plug/port form factor for thinner laptops while Laptop OEMs are not providing much in the way of USB 3.1 Gen2(USB 3.1 controller) connectivity.

Think about this, how many laptop OEMs actually provide schematics that show exactly what ports are actually wired into what PCIe/Groups of PCIe lanes so users can actually tell what ports have to share what bandwidth with what number of controllers that are wired up to the PCIe lanes that run directly to the processor or what PCIe lanes are run to the chipset and then to the processor. So most of those USB ports are sharing bandwidth with other ports of the same standard or even sharing total bandwidth across a chipset that provides for some included connectivity standards for SD card slots/other ports including USB ports etc.

October 3, 2017 | 04:33 PM - Posted by willmore

To be clear, you're talking about Intel laptop processors and chipsets. We've yet to see what AMD is going to do in the spring with their new family of Zen core based mobile chips. If they do like they did on the desktop, Intel may have to make some adjustments to add more PCI-E lanes and that would be good for everyone.

October 3, 2017 | 08:14 PM - Posted by LaptopOEMMarginsAreTooThin (not verified)

What laptops need is for laptops to be the first devices to get PCIe 4.0, or 5.0, abilities and then laptop makers can live with their OEM motherboard designs having fewer total PCIe lanes than PCs have with their many PCIe lanes offered on PC motherboards. Laptop OEM motherbards may not even make use of all the PCIe lanes that the SOC/APU makers' chipsets offer even at the current PCIe 3.0 lane allotment because laptop OEMs are always on the cheap what with all their margins going towards the SOCs currently used in most laptops that come from a single market dominating supplier.

And AMD's Raven Riidge laptop APUs can not get here soon enough to offer more competition and lower pricing pressure towards Intel's higher cost laptop/SOC SKUs for laptop OEMs. AMD better get its collective Inteposer based APU designs with HBM2 included beyond the drawing board and onto the market owing to HBM2's larger data path. And even at a 1024 bits for a single stack of HBM2, it is still many times the width if the standad 2 channels to DIMM based DRAM. HBM2 has some features that HBM/first generation does not have with the JEDEC standad for HBM2 offering the ability to split up the nominal 8, 128 bit indipendently operating HBM2 channels on a single HBM2 stack into 16, 64 bit half channels for some better effencieies on JEDEC HBM2.

Laptop OEMs have been under constant pricing pressure from Intel for many many years and to Intel is where the majority of OEM laptop Bill of Materials(BOM) laptop cost is coming from and Laptop OEM margins are going to Intel more than to the laptop OEMs that build the devices. So laptop OEM's margins under Intel's market domination pricing are razor thin and those margins have to be made up with laptop OEMs gimping laptop of features such as USB 3.1(Gen 2) connectivity and other features that require more expensive OEM laptop motherboard designs.

Until AMD brings a similar to the PC market with desktop Ryzen kinds of pricing pressures/competition to laptop APU/SOC market full force, laptop OEMs are not going to be encouraged to offer better feature sets on mainstream laptop SKUs. And even with some better pricing/BOM materials costs for SOCs/APUs, laptop OEMs are going to need competition from other laptop OEMs to force the laptop makers to offer better feature sets on mainstream laptop offerings.

AMD is supposed to be working on some Interposer based APU Workstation variants iwth HBM2/larger GPUs that will probebly come first and cost a bit more for the professional workstation market. But that's not where AMD should stop as it would be easy to take its soon to srrive Raven Ridge APUs and tweak that design at 12nm for a smaller Zen/Vega CPU/GPU design on a single die and add a second HBM2 die and have a mobile processor APU that will at least offer 256GB/s bandwidth for the integrated GPU and make full use of and that Vega HBCC/HBC IP for virtual VRAM to HBM2/HBC swapped in/out to DIMM based DRAM/SSD on high end mobile APU based laptops designs. That Vega HBCC IP in the hardware makeing use of any HBM2 as HBC on a laptop so larger texture/mesh data sizes can be hardware managed by the Vega HBCC/HBC hardware and laptop gaming performance improved even for APU based systems with only 2GB/4GB of HBM2.

Laptop OEMs margins and revenue streams are all going into one SOC maker's pockets without there being competition. So laptop makers will sometimes not even make use of the PCIe lane allotment offered on current PCIe chipsets just because the SOCs cost so much that the laptop OEMs have to cut corners and gimp the laptop feature sets for the laptop makers to have enough profits to even justify making the laptop in the first place.

Look at the numbers of laptop makers using sponsored bloatware offerings just to add a few more dollars into their revenue streams because laptop OEM's BOMs to one dominant supplier are so high that laptop OEMs are effectively working for that supplier and not for themselves. Raven Ridge needs to get here soon and brig the competition back and the pricing pressures lower before laptop OEMs can be even incentivized to begin offering better laptop options with all the latest features like USB 3.1(Gen 2), or USB 3.2, etc.

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