TSMC Will Begin Mass Production of Enhanced 7nm Node Using EUV In March, 5nm to Follow
Subject: General Tech | February 23, 2019 - 03:08 PM | Tim Verry
Tagged: TSMC, lithography, euv, asml, 7nm, 5nm
According to Hexus, chip manufacturing giant TSMC will begin mass production of its enhanced 7nm process node as soon as next month. The new "CLN7FF+, N7+" mode incorporates limited use of EUV (extreme ultraviolet lithography) on four non-critical layers using specialized equipment from ASML to offer 20% higher transistor density and between six to twelve percent lower power consumption at the same complexity/frequency. Those numbers are versus TSMC's current 7nm process node (CLN7FF, N7) which uses DUV (deep ultraviolet lithography) with ArF (Argon Fluoride) excimer lasers.
TSMC is reportedly buying up slightly more than half of ASML's production of EUV equipment for 2019 with the chip maker reserving 18 of the 30 EUV units that will ship this year. It will use the ASML Twinscan NXE step and scan machines to produce its enhanced 7nm node and allow TSMC to familiarize themselves with the technology and dial it in for use with its upcoming 5nm node (and beyond) which will more heavily incorporate EUV with it being used on up to 14 layers of the 5nm process node manufacturing. AnandTech reports that the 5nm EUV node will bring 1.8-times the transistor density (45% area reduction) of the non-EUV 7nm node along with either 20% less power usage or 15% more performance at the same chip complexity and frequency.
Interestingly, while 7nm production accounted for roughly 9% of TSMC's output in 2018, it will reportedly be up to a quarter of all TSMC's chip shipments in 2019.
Mass production of the 7nm EUV node will begin as soon as March with risk production of 5nm chips slated to being in April with the first chip designs being taped out within the first half of the year. Volume production of 5nm chips is not expected until the first half of 2020, however, though that would put it just in time for AMD's Zen 2+ architecture. Of course, AMD, Apple, HiSilicon, and Xilinx are TSMC's big customers for the current 7nm node (especially AMD who is using TSMC for its 7nm CPU and GPU orders), and Huawei / HiSilicon may well be TSMC's first customer for the EUV incorporating CLN7FF+, N7+ node.
With GlobalFoundries backing off of leading-edge process techs and shelving 7nm, Intel and Samsung are TSMC's competition in this extremely complicated and expensive space. 2020 and beyond are going to be very interesting as EUV production ramps up and is pushed as far as it can go to bring process technologies as close to the theoretical limits that the market will bear. I think we still have a good while left for process shrinks, with some of these lower node numbers being attributed to marketing (with some elements being that small but depending on what and how they measure these nodes) but it is definitely going to get expensive and I am curious who will continue on and carry the ball to the traditional manufacturing process finish line or if we will need some other exotic materials or way of computing paradigm shift to happen before we even attempt to get there simply due to unrealistic R&D and other costs not making it worth it enough for even the big players to pursue.
In talking with Josh Walrath, he clarified that EUV does not, by itself, offer performance enhancements, but it does cut down on exposures/patterning and reduces the steps where things can go wrong which can lead to improved yields when implemented correctly. Using extreme ultraviolet lithography isn't a magic bullet though, as the fabrication equipment is expensive and uses a lot of power driving up manufacturing costs. TSMC is using EUV on its N7+ node to get "tighter metal pitch" and more density along with lower power consumption. Performance improvements are still unknown at this point (to the public, anyway), but as Mr. Walrath said performance isn't going to increase simply from moving to EUV. When moving to 5nm, TSMC does claim performance improvements, but most of those gains are likely attributed to the much higher density of the resulting chips. Using EUV to get yields up at that small of a node is likely the biggest reason for utilizing EUV to get enough useable wafer and dies per wafer. TSMC must believe that the costs [of EUV] versus trying to do it [5nm] without working in EUV into the processis worth it. Stay tuned to this week's PC Perspective podcast if you are interested in additional thoughts from JoshTekk and the team (or check out our Discord server).
What are your thoughts?