Samsung Completes Development of 7nm Process Technology

Subject: General Tech | April 5, 2018 - 04:06 PM |
Tagged: snapdragon 855, Semiconductor, Samsung, qualcomm, process tech, lithography, euv, 7nm, 5nm

According to an article on sedaily.com (translated) Samsung is almost six months ahead of schedule with its 7nm EUV process technology and has managed to complete the development phase as well as secure its first customer in Qualcomm. Samsung is pushing hard and fast with its process technology as it competes with TSMC and other semiconductor foundries and has invested $6 billion in a dedicated EUV line at its foundry in Hwaseong, Korea that is slated for completion in the second half of next year with production ramp-up in 2020.

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Reportedly, Samsung's first 7nm product will be a 7nm LPP (low power plus) node achieved using Extreme Ultraviolet Lithography or EUV. Samsung has set up production conditions and finalized the development of the 7nm EUV process on its Hwaseong S3 line which is located near the future site of the dedicated EUV line mentioned above. The engineers and designers that developed the 7nm process and production line have reportedly shared the design database and methodologies necessary to begin sample production for customers and have moved onto to developing Samsung's 5nm process (which is still in the early stages). Getting the EUV process up and running is an impressive feat and the expertise that Samsung is gaining will be a major breakthrough in the barrier to entry of single-digit nanometer processes.

Samsung has managed to build out 10 extreme ultraviolet lithography units and is allegedly on track to produce the Snapdragon 855 for Qualcomm towards the end of this year or early next year on its new low power 7nm process node. Note that previous reports suggested TSMC would be producing the Snapdragon 855 with SDX50 5G modem so we may have to wait to see how TSMC responds in readying production this year for confirmation on who ultimately wins Qualcomm's orders. As the node number are a bit of marketing speak (they can pick the features they want to measure for the marketing to an extent heh), Samsung notes that its 7nm process can produce dies about 40% smaller than its 10nm process. Further, the smaller process can offer 10% more performance or up to 35% more power efficiency at the same level of performance which will be a huge boost to mobile processors and products! Thanks to the smaller process node, smartphone and tablet manufacturers could produce devices with similar dimensions but larger batteries or thinner devices with the same amount of portable power (I'd vote the former, smartphones are already very thin).

Samsung hopes to press on and complete the development of its 5nm process next year and once the dedicated EUV line in Hwaseong is fully up and running in 2020 the company plans to start mass producing products for its customers on 7nm, 6nm, and 5nm processes!

In all, this is very good news for Samsung and the wider market in general as it will add competition and encourage TSMC, GLOBALFOUNDRIES, and even Intel (with its semi-custom stuff) to continue advancing what is possible and developing and refining the EUV and other even more exotic process technology methods that will be necessary for the extremely complicated and difficult problems they will face in moving beyond 5nm into 3nm and smaller nodes! We are definitely getting to a point where we will within the next decade have to figure out the once-impossible or reinvent the way we process information (e.g. quantum computing) to get things to go any faster. I am very excited and interested to see where the semiconductor industy and global computing as a whole will go from here!

Also read:

Source: SE Daily

April 5, 2018 | 04:37 PM - Posted by RandomPhotonsActingRandomly (not verified)

Is Samsung doing like GF and only using Partal EUV where feasible and other fab steps on a non EUV process for any lithography steps where EUV still needs time to certify. That pellicle problem with EUV is a tough nut to crack and there are other issues still to be fully solved there.

And those stochastic effects(1) are going to get worse at below 7nm.

(1)

"EUV’s New Problem Areas

Random variations will require new methodologies, tools and cooperation among different companies.

March 19th, 2018 - By: Mark LaPedus"

https://semiengineering.com/euvs-new-problem-areas/

April 5, 2018 | 11:13 PM - Posted by Flip (not verified)

It is an interesting annoucement, but one thing for sure is they do not have their 10 tools yet, so they cannot do anything this year.

April 6, 2018 | 12:28 AM - Posted by James

The light sources for EUV are ridiculous. Yields are not going to be good. It is definitely going to favor smaller chips. It will be interesting to see what GPUs look like on 7 nm and below. Giant GPUs just aren’t going to be doable. I am curious as to how Navi will actually be configured. The latency isn’t as important as it is with CPUs, but the bandwidth is more important.

April 6, 2018 | 10:49 AM - Posted by ModularScalableTakesTheMarket (not verified)

Navi is supposed to be made up of modular/scalable Die/Chiplets in a similar manner to AMD's Zen/Zeppelin Modular/Scalable dies. So AMD will not have to have the expense of any very costly multiple monolithic base die tapeouts in order to create any low, midrange, and flagship GPU SKUs.

Nvidia has to spend hundreds of millions on those 5 different base monolithic base die tapeouts(GP100, GP102, GP104, GP106, GP108) each with their own very costly mask sets. So for AMD, if Navi makes use of Modular/Scalable GPU die/chiplets, they can make use of a single modular base die tapeout that's made using a single set of masks and still allow AMD to create from that an entire line of Low, midrange, and flagship GPU SKUs based on scalaing of mouula GPU dies. And smaller dies have much better die/wafer defect rates compared to any large monolithic GPU/CPU die tapeouts.

I'm thinking that AMD will probably make a few modular/scalable GPU base die tapeouts with one being a TMU/ROP heavy modular Die Tapeout for gaming and the outher/s maybe more tuned for more compute/AI with less need for ROPs/TMUs and more need for Shader Cores and Tensor Cores. And AMD will be able to mix and match these Modular/Scalable GPU dies to create more specilized GPUs for Compute/AI only, some compute, AI, and ROPs/TMUs for professional Graphics, as well as some more gaming foucsed Navi designs that have the higher TMUs and ROPs to Shader Core ratios.

EUV needs more Photons to make it through the pellicles and mask sets so there is sufficient photons to resolve the smaller features at 7nm and below. So the EUV wattage needs to go up without distroying the pellicle. Then there is also stochastic distribution of photons issues that lead to too many photons striking the resist in one region and not enough photons striking the resist in another. The more photons generated(Higher Wattage Needed for more photons generated) per unit time the less the stochastic distribution of photons issues become. There needs to be sufficient photons striking the photoresist to fully resolve the features at 7nm/Below.

April 6, 2018 | 09:42 PM - Posted by OBloodyHell (not verified)

I can see it now. The next Hulk movie, Bruce Banner is a fab designer putting the final touches on his all new Gamma Ray Lithography fab when something goes horribly wrong...

:-P

April 9, 2018 | 12:05 PM - Posted by RabidRaccoonWithDistemperToo (not verified)

Is the HULK the one in charge of enforcing Nvidia's GPP terms and conditions?

July 9, 2018 | 11:28 PM - Posted by Vangoddes (not verified)

I also have the same question in mind.

April 6, 2018 | 09:42 PM - Posted by OBloodyHell (not verified)

I can see it now. The next Hulk movie, Bruce Banner is a fab designer putting the final touches on his all new Gamma Ray Lithography fab when something goes horribly wrong...

:-P

April 8, 2018 | 06:29 AM - Posted by Yieldmatters (not verified)

Samsung is not yielding anything right now, and they are struggling with the availability of the tool. Most of the above is just marketing from a company with NO CUSTOMERS at 7nm (they lost Qualcomm). Meanwhile Apple has canned using TSMC N7+ for 2019 because EUV is not ready.

This is a phoney war for now

April 8, 2018 | 03:48 PM - Posted by James

It would be interesting to know what the actual specs of the process are. The process names have been nothing but marketing for years. So what actually is going into their “7 nm” process? It may be improved in some manner, but there is no way to tell by how much. Given the difficulty with EUV, it may still have too low of yields to really be mass market.

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