Mark Papermaster on AMD's tiny things

Subject: General Tech | July 24, 2017 - 12:49 PM |
Tagged: amd, 7nm

Over at The Inquirer you can read a condensed version of AMD's Mark Papermaster discussion about the challenges of moving to a 7nm process node.  The size of AMD's design team have prompted them to take a modular approach to design so that circuits can be reused across CPU, GPU and semi-custom designs.  That allows the the same teams to work on multiple projects and for design successes to improve products across multiple lines, a must for a small team with such diverse products.

He also talks about "2.5-D chip stacks", using silicon interposers to connect processors and memory stacks side-by-side as a way to work on reducing to the 7nm node while waiting for foundries like GLOFO to retool to EUV lithography. He ends with a familiar request; that developers switch their focus to taking advantage of high core counts and parallel threads and away from single cores running at high frequencies.

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"Speaking to the EE Times, Papermaster said that, while AMD planned to run its second and third generation Zen architecture x86 microprocessors on 7nm, it would likely be a 'long node', like the 28nm process, "and when you have a long node it lets the design team focus on micro-architecture and systems solutions", rather than simply redesigning standard ‘blocks'."

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Source: The Inquirer

July 24, 2017 | 04:52 PM - Posted by Clmentoz (not verified)

With Nvidia able to play that power-usage metric for GPUs to great success AMD needs to actually fund its RTG division properly. AMD will Hopefully, via its Zen consumer/pro SKUs sales revenues, have enough revenues to fund RTG's production of a gaming only focused GPU micro-arch with plenty of TMUs, ROPs, and other gaming only features to win the FPS race at the same power usage metrics as Nvidia's gaming only tuned GPU SKUs.

AMD's current GPU SKUs use more power because they are not stripped of compute and unless AMD can make that extra compute act like some extra ROP/TMU functionality then AMD will have a hard time trying to beat Nvidia in the FPS/power usage metrics. Maybe more DX12/Vulkan and games/gaming engine tuning can help things more over time for Vega, and even Vega's primitive shader IP can be programmed to help with some raster operations tasks but RTG needs more R&D funding from AMD to compete with Nvidia.

RTG is lucky for revenues with its Polaris GPUs and that coin mining business in the short term helping with the revenues, and Polaris is also competative with Nvidia in the mainstream gaming market. But RTG needs some better revenue infusions from AMD over the next few years to have the necessary engineers(Hardware/Software) to match Nvidia's massive R&D resources.

July 25, 2017 | 10:24 PM - Posted by Dante (not verified)

Yeah, I heard that too. AMD is branching out into IoT and leaving the desktop market for the server room. Expect to see some autoshow prototypes with an AMD sticker on the side and some lame popstar in a vague AMD commercial soon.

July 26, 2017 | 10:29 AM - Posted by Clmentoz (not verified)

Not the IOT devices' processor market itself, that's already the domain of the really low margin(Even by AMD standards) ARM devices makers and AMD's new ARMv8A ISA running K12 micro-architecture is not even lested on AMD's new product roadmap. The IOT market, even before the markeing wonks coined that Internet of Things moniker, was already in that ARM based makers market hands, look at Intel's IOT/mobile phone SOC market losses and see where that market is going for ultra low cost processors in every device. And Intel has just stopped supporting its last few development IOT projects for low cost processors in IOT devices.

The only part of the IOT market that AMD can hope to gain any meaningful revenues from is the server/cloud services hardware market that is there to provide the online part of the connected app ecosystem services model that dirves Apple's/Others' big revenue streams.

So it's the AMD's Epyc systems in the massive server farms necessary to provide Apple's, Google's, Facebooks, and others online services that are needed to support all the Phone/Tablet/Laptop mobile devices cloud services.

AMD has decided to double down on its professional x86 CPU and Radeon professional GPU/GPU AI server/workstation/HPC market strong points and it's desktop strong points with that workstation/server first Zen/Zeppelin die design that AMD also is using across it consumer Ryzen 7/5/3 desktop and consumer Threadripper HEDT lines of SKUs. Zen/Zeppelin is a server/workstation design first and formoast that can also be binned down and utilized in the Desktop PC/HEDT markets.

The IOT CPU/SOC market is/was already mature even before there was the IOT craze, and that market's margins are so thin that not even AMD can derive any meaningful return on any large scale investment. AMD's EPYC and Radeon Pro WX Vega and Radeon Instinct Vega Based professional market SKUs are where the best revenues/revenue growth is possible for AMD. AMD's semi-custom devices market revenue figures are down this quarter reletive AMD's last years same time frame semi-custom revenue figures where.

It's no suprise to me that Radeon Vega FE is not so tuned for gaming and still has in its design excessive compute relative to any TMU/ROP rendering resources relative to Nvidia's gaming only(stripped of compute) focused GPU SKUs. AMD needs the Vega GPU micro-arch more for its ability in the data center than any raw gaming/FPS only focused workloads. Vega micro-arch based GPU Accelerator/AI SKUs are what AMD needs to complement it Epyc line of Server products targeting the Workstation/Server/HPC/AI markets, and AMD can use Vega to make up for any EPYC FP performance deficiencies relative to Intel Xeon SKUs which have that AVX512 ability.

AMD most likely decided to design it first iteration Zen micro-arch with power savings/die space savings in mind because the majority of the server market workloads don't need massive AVX functionality. So AMD intended to use its GPU/professional SKUs to make up of any FP HPC workloads disadvantages relative to Intel's Xeon on any Epyc based SKUs intended for HPC workloads, while Epyc performs just fine, or better, for any other workstation/server workloads than Intel's Xeons.

July 26, 2017 | 11:55 PM - Posted by James

Cars aren't really IoT devices. Self driving abilities will require a lot more compute than most IoT devices. They could be looking to put their GPUs in cars for processing all of the data from cameras, radar, and whatever else they manage to put in them. An AMD GPU with a lot of ACEs could probably do very well at such task.

July 25, 2017 | 06:48 AM - Posted by ET3D

He ends with a familiar request; that developers switch their focus to taking advantage of high core counts and parallel threads and away from single cores running at high frequencies.

No, actually he asked that developers of tools for chip creation take advantage of multicore.

July 25, 2017 | 12:48 PM - Posted by Clmentoz (not verified)

So that's the EDA software for the automated generation of the masks and the automated design/layout libraries to optimize for multi-CPU core designs. So that design automation software itself needs to be made more multi-CPU core aware for faster processing of the complicated layouts that are using the very same multi-core processors that the EDA software is utilized to create.

I can see AMD wanting the EDA software to take advantage of Epyc's many CPU cores in the most efficient way so AMD can utilize its Epyc SKU based in-house clusters and get the most processing done in the least amount of time. So using the current generation Epyc to design the next generation of Epyc CPU micro-arch with EDA software that is more optimized for 32/64 core and above Epyc based processing systems.

There is also those hardware simulation superclusters CPU/GPU systems that are used to simiulate the circuits/transistors and connection pathways/fabrics for design testing of GPUs/CPUs/Other processors.

"In software, “my call to action for the EDA community…is to redouble their efforts to take advantage of more CPU cores and parallelism…As the processing required for 7nm escalates…their algorithm optimization needs to take advantage of the very technology they are helping us manufacture,” he said, noting AMD’s new Epyc processors sports 32 dual-threaded cores.

“Mask data post processing is highly parallel, and I’m starting to see good enhancement there. I’d like to see it extend to physical design and verification where we spend a lot of resources,” Papermaster said. Meanwhile, AMD has “embraced emulation as a way to accelerate our verification and marry co-verification of software and hardware,” he added.

It’s one of many ways AMD has been punching above its weight to compete with rivals Intel and Nvidia.

“In our turn around, we couldn’t just throw hundreds of designers at a problem, so we designed in more modularity to reuse circuits across client CPUs, GPUs and semicustom chips…We stayed on and even improved time from first silicon to tape out as complexity went up with FinFETs and…verification complexity,” he said.

“The AMD team has always been known for deep talent. We hit a point where we had to pull together to build great products, and there was no room for in-fighting,” he said." (1)[see page 2]

(1)

"AMD’s CTO on 7nm, Chip Stacks

Calls to arms for EDA, OSATs"

http://www.eetimes.com/document.asp?doc_id=1332049

July 27, 2017 | 12:50 AM - Posted by James

My expectations for anything below 14 nm are pretty low. I expect a lot of processes that are still essentially the same as current 14 nm processes just with some tweaks. I expect anything truly smaller to be very late and underperforming, in both yield and characteristics.

I think a lot of performance will come from new design combined with new packaging technologies for the next few years. It is not only silicon interposers, but also other, some what similar, wafer level packaging technologies (the mentioned fan in/fan out tech).

EUV has been talked about for so long, I don't have very high expectations for it being available any time soon either. The reflective optics will require a lot of software work, in addition to all kinds of other issues that do not seem to be solved.

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