Mark Papermaster on AMD's tiny things
Subject: General Tech | July 24, 2017 - 12:49 PM | Jeremy Hellstrom
Tagged: amd, 7nm
Over at The Inquirer you can read a condensed version of AMD's Mark Papermaster discussion about the challenges of moving to a 7nm process node. The size of AMD's design team have prompted them to take a modular approach to design so that circuits can be reused across CPU, GPU and semi-custom designs. That allows the the same teams to work on multiple projects and for design successes to improve products across multiple lines, a must for a small team with such diverse products.
He also talks about "2.5-D chip stacks", using silicon interposers to connect processors and memory stacks side-by-side as a way to work on reducing to the 7nm node while waiting for foundries like GLOFO to retool to EUV lithography. He ends with a familiar request; that developers switch their focus to taking advantage of high core counts and parallel threads and away from single cores running at high frequencies.
"Speaking to the EE Times, Papermaster said that, while AMD planned to run its second and third generation Zen architecture x86 microprocessors on 7nm, it would likely be a 'long node', like the 28nm process, "and when you have a long node it lets the design team focus on micro-architecture and systems solutions", rather than simply redesigning standard ‘blocks'."
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