Honey, I shrunk the silicon
Subject: General Tech | June 5, 2017 - 12:41 PM | Jeremy Hellstrom
Tagged: IBM, global foundries, Samsung, 5nm, 3nm. eulv, GAAFET
Extreme Ultraviolet Lithography has been the hope for reducing process size below the current size but it had not been used to create a successful 5nm chip, until now. IBM, Samsung and GLOBALFOUNDRIES have succeeded in producing a chip using IBM's gate-all-around transistors, which will be known as GAAFETs and will likely replace the current tri-gate FinFETs used today. A GAAFET resembles a FinFET rotated 90 degrees so that the channels run horizontally, stacked three layers high with gates filling in the gaps, hence the name chosen.
Density will go up, this process will fit 30 billion transistors in a 50mm2 chip, 50% more than the previous best commercial process and performance can be increased by 40% at the same power as our current chips or offer the same performance while consuming 75% less power. Ars Technica delves into the technology required to make GAAFETs and more of the potential in their article.
"IBM, working with Samsung and GlobalFoundries, has unveiled the world's first 5nm silicon chip. Beyond the usual power, performance, and density improvement from moving to smaller transistors, the 5nm IBM chip is notable for being one of the first to use horizontal gate-all-around (GAA) transistors, and the first real use of extreme ultraviolet (EUV) lithography."
Here is some more Tech News from around the web:
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- Computex 2017: Gigabyte's latest and greatest gear @ The Tech Report
- The AMD Computex 2017 Press Conference Revealed! @ TechARP
- The Computex Taipei 2017 Live Coverage (Day 4) @ TechARP