AMD will have Ryzen to their Pinnacle next February

Subject: General Tech | September 28, 2017 - 12:23 PM |
Tagged: 12nm, GLOBALFOUNDRIES, amd, ryzen, Pinnacle 7, Pinnacle 5, Pinnacle 3, Pinnacle, x470, b450

DigiTimes reports today that AMD has informed motherboard makers that their new series of chips, the Pinnacle family, will in launch early 2018.  They will lead with the Pinnacle 7 series, with Pinnacle 5 and 3 series arriving in March.  April will see the low powered models while Enterprise will have to wait for the Pro until May.  The chips will be built on GLOFO's 12nm process and will hopefully build on AMD's current successes with Ryzen.  You will also meet the new 400 series chipset, so far the X470 and B450 have been mentioned.  While this is still officially a rumour, it is a fairly solid one. 

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"AMD has informed its partners that it plans to launch in February 2018 an upgrade version of its Ryzen series processors built using a 12nm low-power (12LP) process at Globalfoundries, according to sources at motherboard makers."

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Source: DigiTimes

September 28, 2017 | 01:25 PM - Posted by RyzenTweakedEdition (not verified)

Are you sure it will actually be called "Pinnacle" after the Pinnacle Ridge(platform/code name) and not a consumer branding like the Ryzen(3, 5, 7) Branding/Name that is actually a consumer branding/name for SKUs based on the Summit Ridge(code name platform/consumer binned Zeppelin die).

Maybe AMD will call it Ryzen+ or some other branding/name but it will still be the same Zen Micro-Arch with a new Die Stepping and 12nm node slight improvement over that licensed from Samsung 14nm process that GF currently is using for Ryzen/Summit Ridge. Any Zen based consumer SKUs will do a lot better if they can get those clocks up past the 4.2GHz to 4.5GHz clock range with maybe a little higher boost.

AMD really needs to get its branding names out there in advance to avoid confusion and I wonder just what latency improvments AMD can get from any Infinity Fabric tweaks that may be possible from any new die steppings.

Does the Infinity Fabric have to be tied to the RAM speed or is there room to decouple the clocks and run the Infinity Fabric at a higher rate than the memory clocks. Looking at the Infinity fabric IP it's not tied to any specific CPU/GPU core micro-archetecture and it scales up nicely from mobile CPUs all the way up to Vega GPUs and beyond. So maybe AMD can tweak the Infinity Fabric to be less dependent on the system memory clock speeds and improve on the latency figures for Pinnacle Ridge, and other consumer/HEDT and Epyc/Professional variants that make use of that 8 core/2 CCX unit modular die.

September 29, 2017 | 04:54 AM - Posted by James

The high density design libraries that AMD is using probably do not allow for super high clock speed. Intel could reach much higher clock, but they are thermally limited anyway, so it doesn't necessarily help much. The high density design libraries allow AMD to throw more transistors at the problem rather than pursuing high clock speed. With current thermal limitations, denser, high IPC designs and more cores are flavored over higher clock speeds.

It is unclear whether this is a slightly upgraded part (mostly just a die shrink) or something more. For Zen 2, I expected a 3 CCX device; 12 core die rather than 8. That would make Epyc up to 48 core. I don't know if they can do that on the "12 nm" process though. That may have to wait until "7 nm". Also they will upgrade to PCI express 4.0 speeds at some point. They are already running faster than PCI Express 3.0, but 4.0 is supposed to be over 30 GB/s for an x16. That kind of speed will lower latency due to the high clock in addition to providing high bandwidth. That may also have to wait for "7 nm". I could see them upgrading the infinity fabric speed a bit, but it is really best for software to just be optimized for the separate cache zones. Intel provides a unified last level cache, but they seem to be waisting a lot of power to do it. Upping the clock speed of the fabric will just allow application developers to get away with not optimizing like they should while wasting power.

I would expect just a die shrink with hopefully some clock speed tweaks. They could do a few minor fixes if they have anything in that category. I don't know if they will bump the model numbers (Ryzen 7 2800x) or something else. Intel has bumped the model numbers for their processors without even a die shrink. It was just a tweaked version of the 14 nm process. They could do something like 1750, 1850, or 1900 instead of incementing the major number. I think I would expect more 2xxx type model numbers though. If they have enough production of "12 nm" processors such that they phase out the 14 nm processor right away, then using 2xxx numbers makes some sense.

September 29, 2017 | 11:06 AM - Posted by UnknownsForLayoutsPresently (not verified)

Has AMD stated that they are using the High density design libraries on any Ryzen Desktop or APU Parts because when AMD started that high density design library usage it was at 28nm on the Carrizo/Excavator APUs for mobile only where APUs/CPU are going to be clocker lower anyways.

So I'd think that for any desktop APUs AMD would just go with that 12/"half Node" process shrink/improvment and still use the CPU style automated layout libraries and save any high density GPU style automated layout libraries for any mobile APU variants. Fab process node shrinks do allow for tighter circuit packing but there are layout/thermal/clock-speed constraints that limit how large an area can be so densely packed and that is done at the automated layout/design library process level.

That node, transistor pitch and transistor geometry, stuff has more to do with the fab process technology where the various node options allow for some improvments in electrical Leakage/Switching performance and are not the same as large area chip layout density design arrangements that have to take into account larger area thermal limitations as are done when GPUs or CPUs are laid out.

The process node defines more of a grid of gate-pitch/gate-geometry/cirucit-pitch sizes that are pre-defined and then the automated design libraries are used to get an overall chip layout engineered over that grid that is tuned for different processor workloads, clock speeds, power, and operating thermal constraints, etc.

At least for Mobile devices like Carrizo, not so much Bristol Ridge desktop parts, or for any APUs for mobile only usage that usage of high density design libraries helped AMD save about 35% in area used for the Excavator core without any process node shrink needed, at the cost of high clock speeds. But these parts where for mobile only designs where device form-factor limits clocks/thermals anyways so even parts designed with lower density/higher performnace libraries can not be clocked higher in any mobile form-factor devices.

AMD's APUs, at least for gaming laptops need to be able to match Intel in clcok speeds so I'd think that AMD would have to engineer some APU variants for higher clocks at least to the point that Intel's does for its mobile offerings and Intel appears to be favoring 15-watt desogns even on its future 4 core/U series SOC/Mobile variants.

AMD's Desktop APUs may just morph into being of an APU on an interposer design with the CPU die/s and the GPU die/s fabbed separately and attatched to the Interposer along with the separate HBM2 stacks! AMD has stated that they were working on some server/workstation grade interposer based APU designs.

September 30, 2017 | 09:20 PM - Posted by PsychoForMommyToLove (not verified)

Wow, AMD has so many great technologies at their disposal. I swoon over their amazing intelligence and unwavering success in all fields computer processor related. Imagine something so perfect as RYZEN and then double it. That's Zen. The architecture that genius and super hunk, and Kevin Sorbo look-a-like, Tesla God man helped them forge, seemingly up in the heavens, to save us from the nasty mean old blue team (read: boo!) with their measly 10% IPC improvements each year. I kissed my Jim Keller poster on my wall each night since Zen was announced half a decade ago, and diligently bought bum chip after under-performing bum chip from newegg instead of the power efficient intel offerings, churrizo, backhoe, steamroller, lamename, goddessia, so that the proud underdog Red Team would have more-than-single-digit market share and my 3 shares of AMD tech stock (which I call X3, get it?) would eventually be worth more than the paper they're printed on. Still isn't, but I am hoping for a big surge in 2020 with Zen 2+.

Anyway, how many more ways can I pretend to know about "fabs" and all the other cool big boy tech things while projecting my personal insecurities on a company I honestly know nothing about and who couldn't give a crap about me and my games of solitaire that utilize less than 1% of their THREADRIPPER CPU I took out a small loan to buy, just for bragging rights and so I could complain about how power hungry those laughable i9 chips are. What, only like a 190 single core cinebench score at stock speeds? We'll be there in a few years with Zen 2+, like I said, just you wait and see. And that lame thermal paste, hahaha, don't put any garbage under my processor's lid, except, um, those two failed Zeppelin dies.

AMD's so great. They are the best and nothing anyone says can change my mind. Get ready for my ridiculous reply to this.

October 1, 2017 | 11:07 AM - Posted by ImNotAnInterposer (not verified)

AMD makes a nice comfy Infinity Fabric blanket that I use to snuggle up with every night with over my Lisa Su body pillow.

September 28, 2017 | 01:25 PM - Posted by Sebastian Mai (not verified)

just saying, according to the GF site LP stands for "leading performance" and not low-power
https://www.globalfoundries.com/news-events/press-releases/globalfoundri...

September 28, 2017 | 01:57 PM - Posted by Jeremy Hellstrom

"AMD will launch the low-power version of Pinnacle processors in April 2018 and the enterprise version Pinnacle Pro in May 2018."

That link is talking about the process as opposed to the AMD chips.

September 29, 2017 | 04:57 AM - Posted by James

Are they going to be mobile only at first perhaps? AMD is still missing good mobile parts. The Vega APU might help, but I don't know how it is going to do on power consumption.

September 30, 2017 | 12:09 PM - Posted by tatakai

The article said 12LP was Low Power. Its actually 12nm Leading-Performance. That's what he was referring to

September 28, 2017 | 02:55 PM - Posted by Anonymous2 (not verified)

Can't wait!

September 28, 2017 | 03:20 PM - Posted by J.J (not verified)

New motherboards and proccessors less than a year since Ryzen's release. Intel ,is you?

September 29, 2017 | 09:18 PM - Posted by Anonymousdfdf3 (not verified)

Still AM4, parts will be cross-compatible unlike intel

September 28, 2017 | 04:04 PM - Posted by ja (not verified)

Will we see ECC memory support?

September 28, 2017 | 05:25 PM - Posted by Gikero

Historically, have consumer based AMD chips supported ECC?

September 28, 2017 | 06:48 PM - Posted by NonCertifiedValidatedAtYourOwnRisk (not verified)

Not the Certified/Validated ECC support on the Consumer variants(uncertified and non validated) even if that "ECC" support is turned on. The Epyc branded CPU/SP3 MB parts are the only ones that are really Tested and Certified/Validated for ECC usage and that Certification/Validation takes time and costs extra money to do. So the Epyc/SP3 MB parts from AMD's Epyc/SP3 motherboard partners will have gone through the extra software/firmwere/hardware Certification/Validation steps for ECC to be guaranteed in the Motherboard's warranty.

All that talk of "ECC" support on Threadripper is just confusing when that ECC usage has to go through a costly process to be certified/validated and the consumer MB partners are not going to eat that extra expense and that's why workstation/server motherboards cost a little more but are certified/validated to work with ECC memory.

AMD's Epyc Single socket "P" series processors are actually even lower on the per core pricing than the Threadripper/Ryzen Parts and the Epyc/SP3 motherboards offer 128 PCIe lanes/8 memory channel support that costs less on a feature for feature(MB-price/Price-Per-PCIe-lane and a MB-Price/Price-Per-Memory-Channel) basis compared to Threadripper/X399, even with a MB price of $350 for Threadripper/X399 compared and a Gigibyte single socket Epyc/SP3 Motherboard costing $610-$625.

The Epyc/SP3 motherboards have twice the PCIe lanes and twice the memory channels of TR/X399, and the one Gigabyte Epyc/SP3 motherboard that is being listed inline even offers dual 10Gb ethernet, and other features above and beyond what the consumer Threadripper/X399 motherboard offer.

Really AMD's Epyc/SP3 single socket solutions are so affordable that its not much more in total cost to go Epyc for the Real ECC support and the single socket Epyc/SP3 motherboard pricing will come down once Gigabyte gets some other Brand Name Epyc/SP3 competition in the marketplace. There is some Tyan Epyc/SP3 single socket motherboards that are running around $450 but do not offer as much features as the Gigabyte Epyc/SP3 motherboard.

September 29, 2017 | 09:35 PM - Posted by Photonboy

ZEN+ is the same architecture as Zen now, but with a die-shrink and higher frequency (hopefully 10% higher)

ZEN2 is the 2019(ish) architecture that tweaks the current Ryzen CPU's to improve things. I'm sure they found several areas with latency or other issues.

Both should be compatible with the AM4 platform. There will also be new motherboard chipsets but AFAIK there will be no CPU compatibility issues with current Ryzen CPU's.

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