PCPer Mailbag #42 - May the Fourth Be with Most of You

Subject: Editorial | May 4, 2018 - 09:00 AM |
Tagged: video, Ryan Shrout, pcper mailbag

It's time for the PCPer Mailbag, our weekly show where Ryan and the team answer your questions about the tech industry, the latest and greatest GPUs, the process of running a tech review website, and more!

On today's show:

00:45 - PCPer crew coding skills?
01:51 - Allyn's headset?
03:05 - Network wiring, Cat6 vs. coax?
04:19 - Optane cache for RAID array?
05:47 - Page file on RAM disk?
07:31 - Making an SSD last?
09:28 - SSD game load times: SATA vs. NVMe?
10:49 - Intel hiring AMD employees?
13:13 - Will Zen 2 beat Intel?
15:29 - Windows 10 April Update HDR improvements?
16:49 - Ryan's favorite Star Wars t-shirt?

Want to have your question answered on a future Mailbag? Leave a comment on this post or in the YouTube comments for the latest video. Check out new Mailbag videos each Friday!

Be sure to subscribe to our YouTube Channel to make sure you never miss our weekly reviews and podcasts, and please consider supporting PC Perspective via Patreon to help us keep videos like our weekly mailbag coming!

Source: YouTube

May 4, 2018 | 10:22 AM - Posted by SayMyName (not verified)

Question:

Whats the difference between sequential and random disk read/write. Say I have 10 threads each has opened its own file in append mode and writes to it in 100 iterations with 8k data buffer each iteration. Is it still considered sequential write since each files was being written sequentially ?

What is it that make random IO significantly slower compared to sequential read/write for nand ssds?

May 4, 2018 | 11:45 AM - Posted by Dbsseven

Question: What is the deal with RISC-V? How will it work with/compete with ARM/x86?

May 4, 2018 | 02:07 PM - Posted by tts (not verified)

Its a neato open ISA/arch that anyone can modify and use if they like so its popping up in some shops that like to do semi-custom work for AI stuff hence the hype but that is all real niche and special task for the most part.

It won't really work at all with x86/ARM and right now its not worth thinking off as a competitor either. Mostly just hype right now.

To me stuff like the Mill arch. is way more interesting and viable but you hardly see it talked about.

May 4, 2018 | 06:36 PM - Posted by ModifiedHarvardSecurityMadnessNeverOnStackMachines (not verified)

Western Digital(1) is starting to get more into RISC-V and Nvidia(2) uses RISC-V for its Falcon(FAst Logic CONtrollers) on its various GPU/Other products.

So RISC-V is an open standards ISA with folks able to create exientions to that ISA.

ISAs and the underlying hardware that are engineered to execute that ISA are somewhat different across implementetions as Intel's x86 ISA based CPUs are a little different on the inside than AMD's x86 based designs and the current Spectre/Meltdown vulnerabilities have affected AMD to a lesser degree than Intel/Others.

Most of the modern CPU desgns are loosely based on the Modified harvard architecture and there is the Burroughs stack machine architecture and that Mill architecture.

Intel did acquire softmachines and that IP so maybe Keller will be looking that implementing some veriant of that VISC(Variable Instruction Set Computing) soft machines technology. That Burroughs stack machine architecture actually ran directly on its hardware very lightly parsed down high level code on its Stack Machine based processor cores that are to this day still shead of their time compared to the modified Harvard architecture designs that dominate the microprocessor market today.

All the software that ran on the Burroughs stack machine architecture was reentrant code such was the intrensic nature of the Stack Machine as was implemented by the Burroughs B5500 and later mainframess. A lot of the Modern Java like software virtual machines try and implement a Burroughs Stack Machine like environment in sofware but that's not as secure as there are limitations to the Modified Harvard architecture based microprocessors that can never properly and securely run in software/emulated form that Burroughs Stack Machine Like implementetion on a Non Burroughs Stack architecture.

Many of the security problems that occur on those modified Harvard Architecture based designs are directly related to High Level Object Oriented code and the Old Burroughs Stack Architecture machines where ready made to execute on their processors hardware high level opject orieted code the way the Burroughes Stack machines did naturally on their processor hardware.

(1)

"Western Digital to Use RISC-V for Controllers, Processors, Purpose-Built Platforms"

https://www.anandtech.com/show/12133/western-digital-to-develop-and-use-...

(2)

"NVIDIA Is Building Its Next-Gen Falcon Controller Using RISC-V"

https://www.phoronix.com/scan.php?page=news_item&px=NVIDIA-RISC-V-Next-G...

May 4, 2018 | 02:02 PM - Posted by tts (not verified)

Odd to see Ryan thinks Zen2 won't beat Intel's offerings in single threaded performance.

Currently Zen+ is pretty close (generally within low single digit percent range for the most part) to Intel's latest and even just plain old Zen wasn't all that far behind either with its Broadwell-esque levels of performance.

And Zen2 is generally rumored to be a fairly big step up in IPC from Zen/Zen+ as well. So I'd expect more than a Intel-esque low single digit percent increase in performance with Zen2 which is all they'd need anyway for general performance parity with Intel's offerings now or in 2019 time frames. At least on a per clock basis.

Add in AMD getting access to "7nm" process tech (yes they're scare quotes I know its not really 7nm per se but that is what they're calling it) of some sort that is supposed to be better than Intel's 14nm++ and about on par with Intel's upcoming 10nm process and its looking like Intel won't have a process advantage to fall back on either if they want to keep the performance crown via brute clock speed increases either.

I don't think AMD will be able to outshine Intel's offerings with Zen2 as much as Intel was able to with Sandy Bridge vs Bulldozer, those sorts of jumps just aren't to be expected, but a ~10-15%+ IPC advantage + clock speed parity or even a minor clock speed advantage should be able to put Zen2 solidly ahead of Intel in 2019.

And yeah those sorts of performance numbers are pure conjecture but that is all we have to go on right now. Certainly no rumors suggesting Zen2 will suck or that Intel will have some big new CPU arch. out in 2019.

May 6, 2018 | 02:57 AM - Posted by WhyMe (not verified)

I don't think that's what he said, IIRC he said they'd be close, as in 3-5% close, and that would probably swing either way from generation to generation as each company release newer products.

May 6, 2018 | 07:44 AM - Posted by tts (not verified)

He says that approx. @ 13:37. He does preface that by saying he is guessing of course but based on what available information (which yes is mostly rumors) that guess doesn't seem to make much sense.

Zen+ is already pretty close to being within 3-5% on average BTW. You'd have to assume Zen2 would only by something like 0-2% faster on average if you think it'll still be within that range vs Intel in 2019.

Bear in mind that just by tweaking Zen some with Zen+ they were able to get a bigger performance increase than 0-2%.

May 6, 2018 | 02:48 PM - Posted by WhyMe (not verified)

I'm not sure what performance metrics you're going by but Zen+ is a lot more than 3-5% in single threaded and gaming performance, it's more like 10-30% behind Intel.

And before any fanboys start telling me about this and that benchmark or site showing it closer than that I'm talking about aggregate across many tests and sites.

Personally i agree with Ryan on this, IDK if I'm putting words in his mouth but when he said they'll probably make improvements in IF (IMO) he's not simply guessing at that.

It's based on knowledge of how the ZEN microarchitecture is designed, there's not much more performance to gained on a core level outside of clock speed bumps as it's a damn good design, where there is performance gains to be made (again excluding clock speed bumps) is in the fabric connecting each core within a CCX to its L3.

May 7, 2018 | 10:49 AM - Posted by tts (not verified)

On aggregate Zen performs on par with Broadwell, which if you note a lot of the pre and early post launch benches compared Zen to, which is only about 9% slower per clock than Kabylake.

Also 30% less would mean that Zen would be slower than Sandybridge which is your big tip off that your numbers are bogus, or at absolute best, a pathological corner case which by default aren't supposed to be something you judge general performance by.

There is also nothing about Zen's design that suggests its impossible to improve on either so I don't know what you're talking about there at all. I mean you think they can't improve L1 latency, or inter CCX latency more or what? If anything they have lots of low hanging fruit to go after. Add in a process that will be competitive with Intel's best and you're fooling only yourself if you think they can't beat Intel in 2019 for performance.

May 7, 2018 | 12:52 PM - Posted by WhyMe (not verified)

We're not talking about aggregate performs though, we're talking about single threaded and general performance, something that Ryan said he was unsure what the person meant when referring to general performance but could probably guess what the person meant by general performance.

Given the person asked about general performance in the same sentence as asking about single threaded performance i think it's safe to assume the person intended general performance to mean single core clock-for clock performance.

The numbers aren't bogus it's just your understanding that's lacking, you're conflating performance with speed, Zen+ (12nm) is only 300Mhz faster than Sandybridge (32nm) but that difference in clock speed doesn't correlate to performance as how you measure that depends on what metric you're using, it would be like saying a Bugaty Veron is slower than Usain Bolt, while that's true over 10m it's also highly misleading to make that claim because you're not defining what performance metric you're using.

May 7, 2018 | 01:10 PM - Posted by WhyMe (not verified)

Also just to add, i didn't say it was impossible to improve on the microarchitecture design of ZEN, i said "there's not much more performance to gained on a core level outside of clock speed bumps"

If you actually understood how Zen was designed you'd understand why that's so, improving L1 latency is not something that can be done without effecting everything else as they share the same clock domain as the cores and introducing a clock skew would increase latency, you'd lose more than you'd gain by splitting the domains.

Additionally inter CCX latency has nothing to do with the microarchitecture design of ZEN, IF is totally separate from the cores.

May 4, 2018 | 03:25 PM - Posted by djotter

Can you dedicate some more time to the merch store? I see channels like Level1Techs and Gamers Nexus push there merch pretty hard, but they also have very cool designs. If you are going to do it, do it right :) let those of us who want to fanboy/fangirl out about PCPer do so.

May 6, 2018 | 12:40 PM - Posted by ObjectivityIsHardToFindCurrentlyOnline (not verified)

It's Because GN/others want to get out from under those "Free" review sample strings attatched sorts of requirements and that's a good thing. So that requires that GN/Others purchase/source the testing samples on their own.

Those "Review Manuals" that come with those "Free" review samples business needs just as Much Attention from the FTC/Other government requlators as Nvidia's GPP or Intel's nefarious market dominating tactics.

There is still to this day no Government Regulator Look See into the entire online Free Review Sample process and how those "Review Manuals" illegally restrict what the Press is allowed to report! And I for one would like to see that free review Sample Process specifically regulated and a more ramdom lottery process used. A Process where the CPU/GPU/other product makers are forced to hire an independent impartial(Certified By the FTC) third party to randomly choose the review samples and randomly select press outlets to recieve the review samples. That way there can be no cherry picking of review samples and no CPU/GPU/other makers' able to deny(punitively) any press outlets a chance to recieve a free review sample. And that will be the best way to limit that with strings attatched sorts of control the makers have over the press reporting of product reviews.

The Press also need to be required to make use of a full lineup of benchmakrs and not be able to cherry pick any benchmarking results and that includes a requirement to fully list the testing platform/s complete BIOS settings and other complete information that relates to elimination of any unseen testing platform variables that can affect benchmarking results. That's also including the UUIDs/other identifiers on the benchmarking software/benchmarking software's Libraries/DLL/etc. The press/benchmarking software makers need to be forced to use the scientific method as established by some Bureau of Statistics/Bureau of Standards National/International testing methodologies established for the processors market.

Really CPUs/GPUs/Other processors should be forced to go through the same regiorous sorts of testing that the automotive industry if required to go through. and Processors' performance results scientifically quantified using standardized and certified testing methods. And performance stickers and full data sheets required for the processors with the PC/Laptop/other computing devices also required to have full standardized product data sheets on their hardware, software, and drivers/firmware fully listed.

Laptop's OEM especially need to be required to provide device schematics with a full listing of what chips Makes/Model numbers are used on their Laptop MB's and that includes every little chip and with every little controller and every little PCIe trace listed. That will stop that Only 2 PCIe 3.0 lanes connected to a TB3 controller that requiers at least 4 PCIe 3.0 lanes nonsence that laptop OEM's often hide, amoug other omissions that laptop OEMs are infamous for doing.

Retaliers need to be required to provide potential laptop customers with that devices' full data-sheets/schematics so consumers can make informed decisions. Laptop OEMs have the worst sorts of Graphics/Other software/driver support after the sale issues in the entire computing market so Laptop OEMs need to be watched the closest of all by the regulators.

May 5, 2018 | 04:43 AM - Posted by Anony mouse (not verified)

What are your thoughts on Kyle and Nvidia GPP. Kyle has said it could be the end of HardOCP due to Nvidia asking its partners to pull advertising from the site?

Are tech-sites too dependent on the hands that feed them?

May 5, 2018 | 11:14 PM - Posted by Anony mouse (not verified)

Steve over at Gamers Nexus calls Nvidia out on its bullsh*t

https://www.youtube.com/watch?v=8C6GtZ6U_S8

May 6, 2018 | 04:30 AM - Posted by Dark_wizzie

How much does filling up a SSD close to full affect random reads? How much free space should I leave on my nand SSD if I care about performance a lot?

May 6, 2018 | 08:41 AM - Posted by Rynrisi

With all the NAS Drive systems out there what brand is a more stable brand over others, like drobo vs synology

May 7, 2018 | 04:02 PM - Posted by Anonymous Man Anonymous Man (not verified)

Hi Allyn. Regarding chipsets for USB enclosures (such as the one you chose two or three podcasts back) - which chipets are good to look for when purchasing an enclosure, and which ones would you avoid?

May 9, 2018 | 05:18 PM - Posted by ???? (not verified)

What are the benefits of G-Sync to someone who prefers to play in borderless mode where possible? As I understand it the DWM applies some form of vsync so the main selling point of G-Sync of removing tearing isn't an issue.

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