PCPer Mailbag #14 - 10/20/2017

Subject: Editorial | October 20, 2017 - 09:00 AM |
Tagged: video, Ryan Shrout, pcper mailbag, pcper

It's Friday, which means it's time for PC Perspective's weekly mailbag, our video show where Ryan and team answer your questions about the tech industry, the latest and greatest hardware, the process of running a tech review website, and more!

Here's what you'll find on today's show:

00:36 - Why benchmark high-end components at 1080p?
03:52 - Release timing for Cannon Lake and Ice Lake CPUs?
05:31 - Due to x86 licensing, will AMD ever beat Intel?
07:06 - When will we see X399 NVMe RAID tests?
08:16 - Where are all the FreeSync 2, HDR, and OLED monitors?
11:05 - PCPer office tour?
12:08 - CPU and GPU bottlenecks for gaming?
15:09 - Video outro song?
15:57 - Achtung PCPer!

Be sure to subscribe to our YouTube Channel to make sure you never miss our weekly reviews and podcasts, and please consider supporting PC Perspective via Patreon to help us keep videos like our weekly mailbag coming!

Source: YouTube

October 20, 2017 | 10:08 AM - Posted by ISAsAreOnlyTemplatesSortOf (not verified)

The x86 16/32 bit ISA is Intel IP but the x86 64 bit ISA extentions where created by AMD and Intel has to license the 64 bit x86 ISA extentions from AMD. So there is a cross-licensing agreement between Intel and AMD for the full x86 16/32 bit ISA(Intel) bit ISA and x86 64 bit ISA extentions(AMD).

An ISA is not what makes a CPU microarchitecture more powerful in as much as it is the underlying execution resources and cache/memory subsystems and on die connection fabrics. So if you look at the power8 RISC based ISA design from IBM that underlying execution resources of 16 execution units/assoicated piplines with 8 wide order superscalar decoders that can sustain a 10 instruction issue rate per clock/per core execution rate feeding into those 16 execution piplines/units(per core) then that's a bit more powerful than AMD's or Intel's x86 ISA running designs as far as the x86 makers respective instruction issue width and decoder resources/execution units. That Power8 design supports SMT8(8 processor threads per core) while the AMD's and Intel's variants mostly only support SMT2 or 2 threads per core.

The x86 ISA is not a very elegent ISA if you ask the computer ISA/architecture designers and the x86 ISA has gathered a large amount of ISA legacy bloat over the decades of the x86 16/32/64 bit ISA's existance. So AMD's Zen microarchitecture has a little more execution resources than AMD's precious x86 ISA running custom designs that had no SMT capabilities and different cache subsystems structure compared to Intel's x86 ISA underlying implementation.

ISAs are just execution templates that the underlying CPU execution decoders decode and send to the various piplines/execution units for execution. ISAs can have extented instructions added over the years such as MMX/AVX and such and even the ARMv8A ISA had large SVE(Scalable Vector Instructions) added for 128-bit, 512-bit up to 2048-bit vector instructions.

If you compare Apple's A7 Cyclone ARMv8 ISA running custom microarchitecture that Apple design is twice as wide order superscalar as the Arm Holdings refrence design cores with that Apple A7 having execution resources that are closer to the Intel Haswell design than any of the other custom ARM designs and thoes ARM holdings refrence designs that a lot of phone makers use. So the Apple A7 cyclone has an instruction Issue Width of 6 micro-ops compared to say the Arm Holdings A53 which has a 3 instruction issue width.

The A7 cyclone:

CPU Codename----------------Cyclone,
ARM ISA---------------------ARMv8-A(32/64),
Issue Width-----------------6 micro-ops,
Reorder Buffer Size---------192 micro-ops,
Branch Mispredict Penalty---16 cycles (14 โ€“ 19),
Integer ALUs----------------4,
Load/Store Units------------2,
Load Latency----------------4 Cycles,
Branch Units----------------2,
Indirect Branch Units-------1,
FP/NEON ALUs----------------3,
L1 Cache-โ€“------------------64KB I$ + 64KB D$,
L2 Cache--------------------1MB,
L3 Cache--------------------4MB,

So it is more the amount of execution resources and cache/subsystem resources that make for a more powerful CPU and less a matter of ISA. And someone could with enough time and resources take the ARMv8A RISC ISA and make an underlying hardware design that is just as fat as the IBM power8 hardware that is engineered to execute the Power ISA. And Via OpenPower the Power8/Power9 ISA and core designs can be licensed by others so that's an option for Google/Others also for any in house designs for server/other usage. AMD's K12 project that was managed at the same time by Jim Keller as AMD's Zen x86 project is supposed to be a custom ARMv8A ISA running microarchitecture that is similar to Zen under the hood but is engineered to execute the ARMv8A ISA.

October 20, 2017 | 02:50 PM - Posted by Random Random (not verified)

Branch Mispredict Penalty---16 cycles (14 โ€“ 19),

The mispredict penalty sounds a bit high, are you sure about that? Even AMD's excavator cores have a penalty of about 3 cycles.

October 20, 2017 | 10:43 AM - Posted by Benjamins (not verified)

With your new network set up, are you going to have a small 10Gbps back bone?
I noticed that the Ubiquity EdgeSwitch 16XG is $520 for 12 SFP+ and 4 10Gbe RJ45, I have been thinking of getting that.

October 20, 2017 | 12:14 PM - Posted by Ken Addison

I've heard some pretty lackluster things about that 10 Gigabit EdgeSwitch in particular, so I might hold off on that one if I were you.

We are currently using a Netgear ProSafe XS716E 16 port switch which is way too expensive, but Netgear announced some cheaper 10G-BaseT options earlier this week 

October 20, 2017 | 11:29 AM - Posted by Anonymously Anonymous (not verified)

thumbnail caption:

"OMG, I just smelled my own shart!"

October 20, 2017 | 04:56 PM - Posted by Sebastian Peak

Or, "oh no....that...........................wasn't a fart...."

October 21, 2017 | 03:58 AM - Posted by Dark_wizzie

What perf difference is there with a 960 Pro on PCH lanes vs CPU lanes?

Random old questions, pick one if interested lol:
I read that cstates decrease performance in some tests, albeit by a small amount. Is this small penalty in performance due to slower CPU frequency ramp-up and therefore would disappear if a test was very long?

What really is the difference between cstates and adaptive voltage mode on the motherboard? If I have EIST and I'm on adaptive mode I don't see any benefit in power draw out the wall via a kill-a-watt.

Approx how much loose voltage regulation or excessive ripple could somebody expect to impact their hardware/overclocks?

Does anybody really know if the poor thermal performance under the IHS of Intel cpus are due to the paste only, or whether the adhesive and z-height gap is also an issue?

Will you ever do trace-based analysis of games to show how they put a load on an SSD, and why are the tools to do so ourselves so hard to find/use?

Any thoughts on the complaints of poor QC on the 1440p Gsync 144hz displays? And they say DVID is dead...

Would you guys be interested in a blind/double blind test for the Pcper crew to see just how high of a refreshrate they can notice?

Are there any newish trends in the case or motherboard industries nowadays that you find interesting/and improvement?

October 21, 2017 | 09:11 PM - Posted by dtkflex

Since GPU prices are still not where they should be due to mining, I have put off purchasing or upgrading my current desktop primary pc (Intel Haswell 4790K, 16GB system RAM, AMD R9 290x, Samsung 850 pro 1TB ssd., ASUS PA248 1920x1200 24" monitor).

I currently have an HP 8510p notebook which is now 10 years old, circa 2007, and although it still runs it's showing it's age (Intel core 2 duo with AMD 2600m GPU and 4GB system memory max, hdd replaced with Intel X25M 120GB ssd). Machine came with Windows XP, was upgraded to Windows 7 and even got the free upgrade to Windows 10.
Are any of the new AMD Ravenridge laptops going to be reviewed by PCPer? I wanted to know if any of these APU's will have enough horsepower to target low-end workstation or mid level gaming machines.
Are there any rumors on whether any Ravenridge notebooks will have freesync or freesync 2 displays?

I want to find a less expensive alternative to the current Dell Precision, Lenovo Thinkpad P series or HP Zbooks that have higher end Intel and dedicated AMD or Nvidia workstation parts or high end gaming notebooks in general since this is a second PC and not my primary machine.

October 22, 2017 | 06:17 PM - Posted by Ronny AM (not verified)

I just watched this video from AdoredTV (Scottish is difficult for me as well, but please make an effort :) claiming customers were "conned" on the i5-8400 reviews, pointing to factors as very low base clock speed, only hi-end motherboards available and cherry-picked CPUs for reviewers - and since it's non-K you're stuck with what you get. I would love to hear Ryan's thoughts on this!


October 23, 2017 | 05:51 AM - Posted by Kokorniokos (not verified)

Hi Ryan!
As sharing RAM from system to (mobile) GPUs is a common practice, would it be possible to get it the other way around too?

Using an additional 6 or 8 gigs of DDR5x would be very useful, when for example i render a 3D scene and i don't need my GPU to work.

(I am talking specifically for CPU rendering).

Cheers from Greece!

October 24, 2017 | 11:52 AM - Posted by Dbsseven

Can you comment on the architecture differences which lead to nVidia's better gaming FPS despite AMD having higher theoretical/compute performance? Is this an issue of nVidia including more fixed-function hardware for games, while AMD went with a more flexible design?

October 26, 2017 | 09:50 AM - Posted by Benjamins (not verified)

Can we expect some Ryzen Mobile testing in the future? will you do a mix of compute and gaming.

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