Subject: General Tech | January 21, 2019 - 02:28 PM | Jeremy Hellstrom
Tagged: Playstation, Navi 10 Lite, navi, leak, Gonzalo, APU, amd, PS5, rumor, xbox, Zen 2, Zen+
What's in a name? Depending on how much you read into it, quite a bit, depending on what you infer from product code 2G16002CE8JA2_32/10/10_13E9. There are some very interesting rumours floating around the net today which suggest AMD might have another big win on their hands. They provided much of the hardware for the release of the two major consoles way back in 2013 and there have been recent statements they will be inside the next generation of XBox. Now that NVIDIA is working on supporting Active Sync that benefit is a little less clear in the long term but at least for now they are a little late to the game.
Image credit: Twitter user @TUM_APISAK
The image, from from a source that has a rather impressive track record, demonstrates the decoding process - and pay close attention to the letter "G", the second character in the string, which presumably indicates that this intended for a game console. The source also suggests that this new chip will be a Zen 2 and Navi based APU called Gonzolo, with eight cores clocking between 1GHz to 3.2GHz with 4MB of L2 cache and 16 MB of L3 cache. There is less information on the "Navi 10 Lite" GPU, apart from a belief that it's core will be running at a frequency of at least 1GHz.
Image via Twitter user @KOMACHI_ENSAKA
This is great news for AMD, who have been enjoying the royalties from the sales of consoles and could use the fresh injection of cash as gamers upgrade once the consoles launch.
Here is some more Tech News from around the web:
- Possible Patent For Post Navi GPU Architecture Spotted @ [H]ard}OCP
- Withings Pulse HR review: A longer-lasting competitor to Fitbit’s Alta HR @ Ars Technica
- Negative capacitance appears in ferroelectric materials @ Physicsworld
- Microsoft partner portal 'exposes 'every' support request filed worldwide' today @ The Register
Subject: General Tech | December 13, 2018 - 05:31 AM | Jim Tanous
Tagged: Zen 2, Sunny Cove, snapdragon, ryzen 3, ray tracing, radeon pro, podcast, Optane, Intel, edge, chromium, amd, 3dmark
PC Perspective Podcast #525 - 12/12/2018
Our podcast this week features discusion of the new Intel Sunny Cove architecture, Ryzen 3 rumors, the high-end Snapdragon 8cx, an affordable Radeon Pro GPU, and more!
Subscribe to the PC Perspective Podcast
Check out previous podcast episodes: http://pcper.com/podcast
00:03:21 - AMD Radeon Pro WX8200 Review
00:14:50 - Intel Architecture Day: Sunny Cove, Gen11 iGPU, Foveros
00:27:16 - Ryzen 3 Rumors
00:38:57 - Using a 4K TV as a Monitor
00:43:21 - Snapdragon 8cx
00:57:29 - Microsoft Edge Switching to Chromium
01:03:38 - MSI GTX 1060 with GDDR5X
01:05:40 - 3DMark Port Royal Ray Tracing Benchmark
01:09:03 - Hunting Speculative Execution Vulnerabilities
01:11:38 - 7nm Vega Logo
01:13:49 - Intel Optane DIMM Latency
01:30:45 - The Outer Worlds
Subject: General Tech | December 6, 2018 - 01:14 PM | Jeremy Hellstrom
Tagged: amd, Zen 2, Ryzen 5 3600, Ryzen 3 3300, Ryzen 9 3800, leak, Ryzen 7 3700, Ryzen 3000
If the rumours The Inquirer are helping spread are true then AMD really does believe the third time's the charm. The new series of Ryzen 3000 chips will use Zen 2 cores and will follow Intel's addition of a 9 series, though the quoted price of £400 for the Ryzen 9 3850X is a lot more attractive than Intel's pricing. That chip will sport a 5.1GHz peak clock on its pair of Zen 2 dies with eight cores apiece, though the 135W TDP will need some taming.
Check out the variety of other chips in the Ryzen 3, 5, and 7 families which have leaked out.
"The upcoming third-generation Ryzen chip, slated for release next year, will be based on Team Red's Zen 2 architecture, the successor to its rather successful Zen architecture found in Ryzen 1 and 2 CPUs and EPYC server processors."
Here is some more Tech News from around the web:
- Adobe Flash zero-day exploit... leveraging ActiveX… embedded in Office Doc... BINGO! @ The Register
- Qualcomm Details Snapdragon 855 Mobile Platform Performance And Features @ Techgage
- Now you, too, can snoop on mobe users from 3G to 5G with a Raspberry Pi and €1,100 of gizmos @ The Register
- OCC Reviews the Logitech Circle 2 Security Camera
Subject: General Tech | November 8, 2018 - 01:54 PM | Ken Addison
Tagged: Zen 2, xeon, Vega, rome, radeon instinct, podcast, MI60, Intel, EPYC, cxl-ap, chiplet, cascade lake, amd, 7nm
PC Perspective Podcast #521 - 11/08/18
Join us this week for discussion on AMD's new Zen 2 architecture, 7nm Vega GPUs, SSD encryption vulnerabilities, and more!
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Hosts: Jim Tanous, Jeremy Hellstrom, Josh Walrath, Allyn Malventano, Ken Addison, and Sebastian Peak
Peanut Gallery: Alex Lustenberg
Program length: 1:42:27
Podcast topics of discussion:
Week in Review:
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News items of interest:
Picks of the Week:
Subject: Processors | November 7, 2018 - 11:00 PM | Tim Verry
Tagged: Zen 2, rome, PCI-e 4, Infinity Fabric, EPYC, ddr4, amd, 7nm
In addition to AMD's reveal of 7nm GPUs used in its Radeon Instinct MI60 and MI50 graphics cards (aimed at machine learning and other HPC acceleration), the company teased a few morsels of information on its 7nm CPUs. Specifically, AMD teased attendees of its New Horizon event with information on its 7nm "Rome" EPYC processors based on the new Zen 2 architecture.
Tom's Hardware spotted the upcoming Epyc processor at AMD's New Horizon event.
The codenamed "Rome" EPYC processors will utilize a MCM design like its EPYC and Threadripper predecessors, but increases the number of CPU dies from four to eight (with each chiplet containing eight cores with two CCXs) and adds a new 14nm I/O die that sits in the center of processor that consolidates memory and I/O channels to help even-out the latency among all the cores of the various dies. This new approach allows each chip to directly access up to eight channels of DDR4 memory (up to 4TB) and will no longer have to send requests to neighboring dies connected to memory which was the case with, for example, Threadripper 2. The I/O die is speculated by TechPowerUp to also be responsible for other I/O duties such as PCI-E 4.0 and the PCH communication duties previously integrated into each die.
"Rome" EPYC processors with up to 64 cores (128 threads) are expected to launch next year with AMD already sampling processors to its biggest enterprise clients. The new Zen 2-based processors should work with existing Naples and future Milan server platforms. EPYC will feature from four to up to eight 7nm Zen 2 dies connected via Infinity Fabric to a 14nm I/O die.
AMD CEO Lisa Su holding up "Rome" EPYC CPU during press conference earlier this year.
The new 7nm Zen 2 CPU dies are much smaller than the dies of previous generation parts (even 12nm Zen+). AMD has not provided full details on the changes it has made with the new Zen 2 architecutre, but it has apparently heavily tweaked the front end operations (branch prediction, pre-fetching) and increased cache sizes as well as doubling the size of the FPUs to 256-bit. The architectural improvements alogn with the die shrink should allow AMD to show off some respectable IPC improvements and I am interested to see details and how Zen 2 will shake out.
Subject: Processors | June 5, 2018 - 11:22 PM | Ryan Shrout
Tagged: Zen 2, Zen, rome, amd
The first whiffs of Zen 2 are finally reaching us. During the AMD press conference at Computex today CEO Dr. Lisa Su stood on stage and held up the first public showing of Rome, the codename for AMD’s next-generation EPYC enterprise processor family.
Rome is exciting because it will be the first 7nm high-performance processor in the market, and it makes the 10nm production problems that Intel is having all the more troublesome for the blue-chip giant. And because Rome will be socket compatible with the currently shipping EPYC systems, there is a huge potential for market penetration through 2019.
AMD stated that it would be sampling Rome-based Zen 2 processors to partners in the second half of 2018, with launch in 2019. AMD does have silicon back in the labs, up and running. No more timing detail was given than that.
The competitive statement of AMD putting timeframes on its 7nm server processors, rumored to be going up to 64-cores PER SOCKET, while Intel struggles with its move to 10nm, is significant. AMD still targets a 5% market share for server processors by the end of the year, but it might be 2019 that proves to be a more significant year for the company’s drive back into the server space.
Subject: Processors | February 19, 2018 - 08:33 PM | Scott Michaud
Tagged: amd, Zen, Zen 2
WCCFTech found some rumors (scroll down near the bottom of the linked article) about AMD’s upcoming EPYC “Rome” generation of EPYC server processors. The main point is that users will be able to buy up to 64 cores (128 threads) on a single packaged processor. This increase in core count will likely be due to the process node shrink, from 14nm down to GlobalFoundries’ 7nm. This is not the same as the upcoming second-generation Zen processors, which are built on 12nm and expected to ship in a few months.
Rome is probably not coming until 2019.
But when it does… up to 128 threads. Also, if I’m understanding WCCFTech’s post correctly, AMD will produce two different dies for this product line. One design will have 12 cores per die (x4 for 48 cores per package) and the other will have 16 cores per die (x4 for 64 cores per package). The reason why this is interesting is because AMD is, apparently, expecting to sell enough volume to warrant multiple chip designs, rather than just making a flagship and filling in SKUs with bin sorting and cutting off the cores that require abnormally high voltage for a given clock rate as parts with lesser core count. (That will happen too, as usual, but from two different intended designs instead of just the flagship.)
If it works out as AMD plans, this could be an opportunity to acquire prime market share away from Intel and their Xeon processors. The second chip might let them get into second-tier servers with an even more cost-efficient part, because a 12-core die will bin better than a 16-core one and, as mentioned, yield more from a wafer anyway.
Again, this is a common practice from a technical standpoint; the interesting part is that it could work out well for AMD from a strategic perspective. The timing and market might be right for EPYC in various classes of high-end servers.
Beating AMD and Analyst Estimates
January 30th has rolled around and AMD released their Q4 2017 results. The results were positive and somewhat unexpected. I have been curious how the company fared and was waiting for these results to compare them to the relatively strong quarter that Intel experienced. At the Q3 earnings AMD was not entirely bullish about how Q4 would go. The knew that it was going to be a down quarter as compared to an unexpectedly strong third quarter, but they were unsure how that was going to pan out. The primary reason that Q4 was not going to be as strong was due to the known royalty income that AMD was expecting from their Semi-Custom Group. Q4 has traditionally been bad for that group as all of their buildup for the holiday season came from Q1 and Q2 rampings of the physical products that would be integrated into consoles.
The results exceeded AMD’s and analysts’ expectations. They were expecting in the $1.39B range, but their actual revenue came in at a relatively strong $1.48B. Not only was the quarter stronger than expected, but AMD was able to pull out another positive net income of $61M. It has been a while since AMD was able to post back to back profitable quarters. This allowed AMD to have a net positive year to the tune of $43M where in 2016 AMD had a loss of $497M. 2017 as a whole was $1.06B more in revenue over 2016. AMD has been historically lean in terms of expenses for the past few years, and a massive boost in revenue has allowed them to invest in R&D as well as more aggressively ramp up their money making products to compete more adequately with Intel, who is having their own set of issues right now with manufacturing and security.