Subject: Processors | February 7, 2018 - 09:01 AM | Tim Verry
Tagged: Xeon D, xeon, servers, networking, micro server, Intel, edge computing, augmented reality, ai
Intel announced a major refresh of its Xeon D System on a Chip processors aimed at high density servers that bring the power of the datacenter as close to end user devices and sensors as possible to reduce TCO and application latency. The new Xeon D 2100-series SoCs are built on Intel’s 14nm process technology and feature the company’s new mesh architecture (gone are the days of the ring bus). According to Intel the new chips are squarely aimed at “edge computing” and offer up 2.9-times the network performance, 2.8-times the storage performance, and 1.6-times the compute performance of the previous generation Xeon D-1500 series.
Intel has managed to pack up to 18 Skylake-based processing cores, Quick Assist Technology co-processing (for things like hardware accelerated encryption/decryption), four DDR4 memory channels addressing up to 512 GB of DDR4 2666 MHz ECC RDIMMs, four Intel 10 Gigabit Ethernet controllers, 32 lanes of PCI-E 3.0, and 20 lanes of flexible high speed I/O that includes up to 14 lanes of SATA 3.0, four USB 3.0 ports, or 20 lanes of PCI-E. Of course, the SoCs support Intel’s Management Engine, hardware virtualization, HyperThreading, Turbo Boost 2.0, and AVX-512 instructions with 1 FMA (fuse-multiply-add) as well..
Suffice it to say, there is a lot going on here with these new chips which represent a big step up in capabilities (and TDPs) further bridging the gap between the Xeon E3 v5 family and Xeon E5 family and the new Xeon Scalable Processors. Xeon D is aimed at datacenters where power and space are limited and while the soldered SoCs are single socket (1P) setups, high density is achieved by filling racks with as many single processor Mini ITX boards as possible. Xeon D does not quite match the per-core clockspeeds of the “proper” Xeons but has significantly more cores than Xeon E3 and much lower TDPs and cost than Xeon E5. It’s many lower clocked and lower power cores excel at burstable tasks such as serving up websites where many threads may be generated and maintained for long periods of time but not need a lot of processing power and when new page requests do come in the cores are able to turbo boost to meet demand. For example, Facebook is using Xeon D processors to serve up its front end websites in its Yosemite OpenRack servers where each server rack holds 192 Xeon D 1540 SoCs (four Xeon D boards per 1U sleds) for 1,536 Broadwell cores. Other applications include edge routers, network security appliances, self-driving vehicles, and augmented reality processing clusters. The autonomous vehicles use case is perhaps the best example of just what the heck edge computing is. Rather than fighting the laws of physics to transfer sensor data back to a datacenter for processing to be sent back to the car to in time for it to safely act on the processed information, the idea of edge computing is to bring most of the processing, networking, and storage power as close as possible to both the input sensors and the device (and human) that relies on accurate and timely data to make decisions.
As far as specifications, Intel’s new Xeon D lineup includes 14 processor models broken up into three main categories. The Edge Server and Cloud SKUs include eight, twelve, and eighteen core options with TDPs ranging from 65W to 90W. Interestingly, the 18 core Xeon D does not feature the integrated 10 GbE networking the lower end models have though it supports higher DDR4 memory frequencies. The two remaining classes of Xeon D SoCs are “Network Edge and Storage” and “Integrated Intel Quick Assist Technology” SKUs. These are roughly similar with two eight core, one 12 core, and one 16 core processor (the former also has a quad core that isn’t present in the latter category) though there is a big differentiator in clockspeeds. It seems customers will have to choose between core clockspeeds or Quick Assist acceleration (up to 100 Gbps) as the chips that do have QAT are clocked much lower than the chips without the co-processor hardware which makes sense because they have similar TDPs so clocks needed to be sacrificed to maintain the same core count. Thanks to the updated architecture, Intel is encroaching a bit on the per-core clockspeeds of the Xeon E3 and Xeon E5s though when turbo boost comes into play the Xeon Ds can’t compete.
The flagship Xeon D 2191 offers up two more cores (four additional threads) versus the previous Broadwell-based flagship Xeon D 1577 as well as higher clockspeeds at 1.6 GHz base versus 1.3 GHz and 2.2 GHz turbo versus 2.1 GHz turbo. The Xeon D 2191 does lack the integrated networking though. Looking at the two 16 core refreshed Xeon Ds compared to the 16 core Xeon D 1577, Intel has managed to increase clocks significantly (up to 2.2 GHz base and 3.0 GHz boost versus 1.3 GHz base and 2.10 GHz boost), double the number of memory channels and network controllers, and increase the maximum amount of memory from 128 GB to 512 GB. All those increases did come at the cost of TDP though which went from 45W to 100W.
Xeon D has always been an interesting platform both for enthusiasts running VM labs and home servers and big data enterprise clients building and serving up the 'next big thing' built on the astonishing amounts of data people create and consume on a daily basis. (Intel estimates a single self driving car would generate as much as 4TB of data per day while the average person in 2020 will generate 1.5 GB of data per day and VR recordings such as NFL True View will generate up to 3TB a minute!) With Intel ramping up both the core count, per-core performance, and I/O the platform is starting to not only bridge the gap between single socket Xeon E3 and dual socket Xeon E5 but to claim a place of its own in the fast-growing server market.
I am looking forward to seeing how Intel's partners and the enthusiast community take advantage of the new chips and what new projects they will enable. It is also going to be interesting to see the responses from AMD (e.g. Snowy Owl and to a lesser extent Great Horned Owl at the low and niche ends as it has fewer CPU cores but a built in GPU) and the various ARM partners (Qualcomm Centriq, X-Gene, Ampere, ect.*) as they vie for this growth market space with higher powered SoC options in 2018 and beyond.
- New Intel Xeon D Broadwell Processors Aimed at Low Power, High Density Servers
- Intel Xeon Scalable Processor Launch - New Architecture, New Platform for Data Center
- Qualcomm Centriq 2400 Arm-based Server Processor Begins Commercial Shipment
- Today's bonus AMD rumour: Starship, Naples, Zeppelin and a flock of Owls
*Note that X-Gene and Ampere are both backed by the Carlyle Group now with MACOM having sold X-Gene to Project Denver Holdings and the ex-Intel employee led Ampere being backed by the Carlyle Group.
Subject: Processors | October 23, 2015 - 02:21 PM | Sebastian Peak
Tagged: Xeon D, SoC, rumor, report, processor, Pentium D, Intel, cpu
Intel's Xeon D SoC lineup will soon expand to include 12-core and 16-core options, after the platform launched earlier this year with the option of 4 or 8 cores for the 14 nm chips.
The report yesterday from CPU World offers new details on the refreshed lineup which includes both Xeon D and Pentium D SoCs:
"According to our sources, Intel have made some changes to the lineup, which is now comprised of 13 Xeon D and Pentium D SKUs. Even more interesting is that Intel managed to double the maximum number of cores, and consequentially combined cache size, of Xeon D design, and the nearing Xeon D launch may include a few 12-core and 16-core models with 18 MB and 24 MB cache."
The move is not unexpected as Intel initially hinted at an expanded offering by the end of the year (emphasis added):
"...the Intel Xeon processor D-1500 product family is the first offering of a line of processors that will address a broad range of low-power, high-density infrastructure needs. Currently available with 4 or 8 cores and 128 GB of addressable memory..."
Current Xeon D Processors
The new flagship Xeon D model will be the D-1577, a 16-core processor with between 18 and 24 MB of L3 cache (exact specifications are not yet known). These SoCs feature integrated platform controller hub (PCH), I/O, and dual 10 Gigabit Ethernet, and the initial offerings had up to a 45W TDP. It would seem likely that a model with double the core count would either necessitate a higher TDP or simply target a lower clock speed. We should know more before too long.
For futher information on Xeon D, please check out our previous coverage:
- New Intel Xeon D Broadwell Processors Aimed at Low Power, High Density Servers @ PC Perspective.
- Xeon D Podcast Discussion at 0:40:35 (YouTube or downloadable audio).
Subject: General Tech | March 19, 2015 - 06:12 PM | Ken Addison
Tagged: Xeon D, X99, windows 10, video, usb 3.1, titan x, podcast, nvidia, msi, Intel, HSA 1.0, gtx titan x, gtc 2015, digits devbox, DIGITS, asrock
Join us this week as we the NVIDIA GTX TITAN X, News from GTC2015, Mini-ITX X99 motherboard and more!
The URL for the podcast is: http://pcper.com/podcast - Share with your friends!
- iTunes - Subscribe to the podcast directly through the Store
- RSS - Subscribe through your regular RSS reader
- MP3 - Direct download link to the MP3 file
Hosts: Josh Walrath, Jeremy Hellstrom, Allyn Malventano, and Morry Teitelman
Program length: 1:16:27
Subject: Editorial, Processors | March 12, 2015 - 08:29 PM | Tim Verry
Tagged: Xeon D, xeon, servers, opinion, microserver, Intel
Intel dealt a blow to AMD and ARM this week with the introduction of the Xeon Processor D Product Family of low power server SoCs. The new Xeon D chips use Intel’s latest 14nm process and top out at 45W. The chips are aimed at low power high density servers for general web hosting, storage clusters, web caches, and networking hardware.
Currently, Intel has announced two Xeon D chips, the Xeon D-1540 and Xeon D-1520. Both chips are comprised of two dies inside a single package. The main die uses a 14nm process and holds the CPU cores, L3 cache, DDR3 and DDR4 memory controllers, networking controller, PCI-E 3.0, and USB 3.0 while a secondary die using a larger (but easier to implement) manufacturing process hosts the higher latency I/O that would traditionally sit on the southbridge including SATA, PCI-E 2.0, and USB 2.0.
In all, a fairly typical SoC setup from Intel. The specifics are where things get interesting, however. At the top end, Xeon D offers eight Broadwell-based CPU cores (with Hyper-Threading for 16 total threads) clocked at 2.0 GHz base and 2.5 GHz max all-core Turbo (2.6 GHz on a single core). The cores are slightly more efficient than Haswell, especially in this low power setup. The eight cores can tap into 12MB of L3 cache as well as up to 128GB of registered ECC memory (or 64GB unbuffered and/or SODIMMs) in DDR3 1600 MHz or DDR4 2133 MHz flavors. Xeon D also features 24 PCI-E 3.0 lanes (which can be broken up to as small as six PCI-E 3.0 x4 lanes or in a x16+x8 configuration among others), eight PCI-E 2.0 lanes, two 10GbE connections, six SATA III 6.0 Gbps channels, four USB 3.0 ports, and four USB 2.0 ports.
All of this hardware is rolled into a part with a 45W TDP. Needless to say, this is a new level of efficiency for Xeons! Intel chose to compare the new chips to its Atom C2000 “Avoton” (Silvermont-based) SoCs which were also aimed at low power servers and related devices. According to the company, Xeon D offers up to 3.4-times the performance and 1.7-times the performance-per-watt of the top end Atom C2750 processor. Keeping in mind that Xeon D uses approximately twice the power as Atom C2000, it is still looking good for Intel since you are getting more than twice the performance and a more power efficient part. Further, while the TDPs are much higher,
Intel has packed Xeon D with a slew of power management technology including Integrated Voltage Regulation (IVR), an energy efficient turbo mode that will analyze whether increased frequencies actually help get work done faster (and if not will reduce turbo to allow extra power to be used elsewhere on the chip or to simply reduce wasted energy), and optional “hardware power management” that allows the processor itself to determine the appropriate power and sleep states independently from the OS.
Being server parts, Xeon D supports ECC, PCI-E Non-Transparent Bridging, memory and PCI-E Checksums, and corrected (errata-free) TSX instructions.
Ars Technica notes that Xeon D is strictly single socket and that Intel has reserved multi-socket servers for its higher end and more expensive Xeons (Haswell-EP). Where does the “high density” I mentioned come from then? Well, by cramming as many Xeon D SoCs on small motherboards with their own RAM and IO into rack mounted cases as possible, of course! It is hard to say just how many Xeon Ds will fit in a 1U, 2U, or even 4U rack mounted system without seeing associated motherboards and networking hardware needed but Xeon D should fare better than Avoton in this case since we are looking at higher bandwidth networking links and more PCI-E lanes, but AMD with SeaMicro’s Freedom Fabric and head start on low power x86 and ARM-based Opteron chip research as well as other ARM-based companies like AppliedMicro (X-Gene) will have a slight density advantage (though the Intel chips will be faster per chip).
Which brings me to my final point. Xeon D truly appears like a shot across both ARM and AMD’s bow. It seems like Intel is not content with it’s dominant position in the overall server market and is putting its weight into a move to take over the low power server market as well, a niche that ARM and AMD in particular have been actively pursuing. Intel is not quite to the low power levels that AMD and other ARM-based companies are, but bringing Xeon down to 45W (with Atom-based solutions going upwards performance wise), the Intel juggernaut is closing in and I’m interested to see how it all plays out.
Right now, ARM still has the TDP and customization advantage (where customers can create custom chips and cores to suit their exact needs) and AMD will be able to leverage its GPU expertise by including processor graphics for a leg up on highly multi-threaded GPGPU workloads. On the other hand, Intel has the better manufacturing process and engineering budget. Xeon D seems to be the first step towards going after a market that they have in the past not really focused on.
With Intel pushing its weight around, where will that leave the little guys that I have been rooting for in this low power high density server space?
Subject: General Tech | March 9, 2015 - 12:23 PM | Jeremy Hellstrom
Tagged: Xeon D, Intel, Broadwell, 14 nm trigate
Intel's new entry into the low powered server chip market will be called the Xeon D and will be 14-nm process with tri-gate transistors and a TDP ranging from ~25-45W. The chip will use Broadwell cores with 64K of combined L1 cache and 256K of L2 per core as well as 1.5MB of a shared pool of 12MB of L3 cache, aka last level cache. The chip itself will have 24 lanes of Gen3 PCIe as well as a pair of 10Gbps NICs and the I/O controller that shares space on the chip will add six SATA3 ports, another eight lanes of PCIe Gen2, and USB support. The Tech Report only had frequencies for two chips, the 8 core Xeon D-1450 has a base clock of 2GHz, an all-core Turbo peak of 2.5GHz, and a single-core Turbo peak of 2.6GHz while the Xeon D-1520 hits 2.2GHz base frequency, 2.5GHz all-core Turbo, and a 2.6GHz single-core peak. Check out more in the full review here.
"The Xeon D is Intel's pre-emptive strike against upcoming ARM-based competition in the server market. Built on 14-nm process tech and fortified with Broadwell cores, this single-node processor looks like the future of the Xeon lineup."
Here is some more Tech News from around the web:
- PrintDisplay: DIY Displays and Touchscreens Anyone Can Print @ Slashdot
- What’s new in Office 2016 for Mac (and why it doesn't totally suck) @ The Register
- Netflix: Look folks, it's net neutrality... HA, fooled you @ The Register
- D-Link Small Office Security System with DNR-202L @ TechwareLabs