Subject: Processors | March 14, 2017 - 03:17 PM | Jeremy Hellstrom
Tagged: nvidia, JetsonTX1, Denver, Cortex A57, pascal, SoC
Amongst the furor of the Ryzen launch the NVIDIA's new Jetson TX2 SoC was quietly sent out to reviewers and today the NDA expired so we can see how it performs. There are more Ryzen reviews below the fold, including Phoronix's Linux testing if you want to skip ahead. In addition to the specifications in the quote, you will find 8GB of 128-bit LPDDR4 offering memory bandwidth of 58.4 GB/s and 32GBs of eMMC for local storage. This Jetson is running JetPack 3.0 L4T based off of the Linux 4.4.15 kernel. Phoronix tested out its performance, see for yourself.
"Last week we got to tell you all about the new NVIDIA Jetson TX2 with its custom-designed 64-bit Denver 2 CPUs, four Cortex-A57 cores, and Pascal graphics with 256 CUDA cores. Today the Jetson TX2 is shipping and the embargo has expired for sharing performance metrics on the JTX2."
Here are some more Processor articles from around the web:
- Hands-On Nvidia Jetson TX2: Fast Processing for Embedded Devices @ Hack a Day
- AMD Ryzen 7 1700X Review; Testing SMT @ Hardware Canucks
- AMD Ryzen 7 1700 Linux Benchmarks: Great Multi-Core Performance For $329 @ Phoronix
Subject: Processors | March 7, 2017 - 09:02 AM | Tim Verry
Tagged: SoC, server, ryzen, opteron, Naples, HPC, amd
Over the summer, AMD introduced its Naples platform which is the server-focused implementation of the Zen microarchitecture in a SoC (System On a Chip) package. The company showed off a prototype dual socket Naples system and bits of information leaked onto the Internet, but for the most part news has been quiet on this front (whereas there were quite a few leaks of Ryzen which is AMD's desktop implementation of Zen).
The wait seems to be finally over, and AMD appears ready to talk more about Naples which will reportedly launch in the second quarter of this year (Q2'17) with full availability of processors and motherboards from OEMs and channel partners (e.g. system integrators) happening in the second half of 2017. Per AMD, "Naples" processors are SoCs with 32 cores and 64 threads that support 8 memory channels and a (theoretical) maximum of 2TB DDR4-2667. (Using the 16GB DIMMs available today, Naples support 256GB of DDR4 per socket.) Further, the Naples SoC features 64 PCI-E 3.0 lanes. Rumors also indicated that the SoC included support for sixteen 10GbE interfaces, but AMD has yet to confirm this or the number of SATA/SAS ports offered. AMD did say that Naples has an optimized cache structure for HPC compute and "dedicated security hardware" though it did not go into specifics. (The security hardware may be similar to the ARM TrustZone technology it has used in the past.)
Naples will be offered in single and dual socket designs with dual socket systems offering up 64 cores, 128 threads, 32 DDR4 DIMMs (512 GB using 16 GB modules) on 16 total memory channels with 21.3 GB/s per channel bandwidth (170.7 GB/s per SoC), 128 PCI-E 3.0 lanes, and an AMD Infinity Fabric interconnect between the two processor sockets.
AMD claims that its Naples platform offers up to 45% more cores, 122% more memory bandwidth, and 60% more I/O than its competition. For its internal comparison, AMD chose the Intel Xeon E5-2699A V4 which is the processor with highest core count that is intended for dual socket systems (there are E7s with more cores but those are in 4P systems). The Intel Xeon E5-2699A V4 system is a 14nm 22 core (44 thread) processor clocked at 2.4 GHz base to 3.6 GHz turbo with 55MB cache. It supports four channels of DDR4-2400 for a maximum bandwidth of 76.8 GB/s (19.2 GB/s per channel) as well as 40 PCI-E 3.0 lanes. A dual socket system with two of those Xeons features 44 cores, 88 threads, and a theoretical maximum of 1.54 TB of ECC RAM.
AMD's reference platform with two 32 core Naples SoCs and 512 GB DDR4 2400 MHz was purportedly 2.5x faster at the seismic analysis workload than the dual Xeon E5-2699A V4 OEM system with 1866 MHz DDR4. Curiously, when AMD compared a Naples reference platform with 44 cores enabled and running 1866 MHz memory to a similarly configured Intel system the Naples platform was twice as fast. It seems that the increased number of memory channels and memory bandwidth are really helping the Naples platform pull ahead in this workload.
AMD further claims that its Naples platform is more balanced and suited to cloud computing and scientific and HPC workloads than the competition. Specifically, Forrest Norrod the Senior Vice president and General Manager of AMD's Enterprise, Embedded, and Semi-Custom Business Unit stated:
“’Naples’ represents a completely new approach to supporting the massive processing requirements of the modern datacenter. This groundbreaking system-on-chip delivers the unique high-performance features required to address highly virtualized environments, massive data sets and new, emerging workloads.”
There is no word on pricing yet, but it should be competitive with Intel's offerings (the E5-2699A V4 is $4,938). AMD will reportedly be talking data center strategy and its upcoming products during the Open Compute Summit later this week, so hopefully there will be more information released at those presentations.
(My opinions follow)
This is one area where AMD needs to come out strong with support from motherboard manufacturers, system integrators, OEM partners, and OS and software validation to succeed. Intel is not likely to take AMD encroaching on its lucrative server market share lightly, and AMD is going to have a long road ahead of it to regain the market share it once had in this area, but it does have a decent architecture on its hands to build off of with Zen and if it can secure partner support Intel is certainly going to have competition here that it has not had to face in a long time. Intel and AMD competing over the data center market is a good thing, and as both companies bring new technology to market it will trickle down into the consumer level hardware. Naples' success in the data center could mean a profitable AMD with R&D money to push Zen as far as it can – so hopefully they can pull it off.
What are your thoughts on the Naples SoC and AMD's push into the server market?
- Zen and the Art of CPU Design
- AMD Zen Architecture Overview: Focus on Ryzen
- Dissecting AMD Zen Architecture - Interview with David Kanter
Introduction and Specifications
The Mate 9 is the current version of Huawei’s signature 6-inch smartphone, building on last year’s iteration with the company’s new Kirin 960 SoC (featuring ARM's next-generation Bifrost GPU architecture), improved industrial design, and exclusive Leica-branded dual camera system.
In the ultra-competitive smartphone world there is little room at the top, and most companies are simply looking for a share of the market. Apple and Samsung have occupied the top two spots for some time, with HTC, LG, Motorola, and others, far behind. But the new #3 emerged not from the usual suspects, but from a name many of us in the USA had not heard of until recently; and it is the manufacturer of the Mate 9. And comparing this new handset to the preceding Mate 8 (which we looked at this past August), it is a significant improvement in most respects.
With this phone Huawei has really come into their own with their signature phone design, and 2016 was a very good product year with the company’s smartphone offerings. The P9 handset launched early in 2016, offering not only solid specs and impressive industrial design, but a unique camera that was far more than a gimmick. Huawei’s partnership with Leica has resulted in a dual-camera system that operates differently than systems found on phones such as the iPhone 7 Plus, and the results are very impressive. The Mate 9 is an extension of that P9 design, adapted for their larger Mate smartphone series.
Subject: General Tech | January 3, 2017 - 09:10 PM | Sebastian Peak
Tagged: VR, SoC, snapdragon 835, qualcomm, processor, mobile, CES 2017, CES, AR
Qualcomm Technologies, Inc and ODG (Osterhout Design Group) have announced that the R-8 and R-9 smartglasses will be the first devices powered by the new Qualcomm Snapdragon 835 SoC. ODG is a developer of "mobile headworn computing and augmented reality technologies and products", and these new models leverage the reduced size and thermal requirements of the new Snapdragon 835 processor.
The R-8 smartglasses, seated next to a glass mug for scale
"The premium Snapdragon 835 processor was designed from the ground-up to support new and innovative products and experiences beyond mobile phones, and it’s great to see that the first announced Snapdragon 835 devices will be ODG’s smartglasses," said Raj Talluri, senior vice president, product management, Qualcomm Technologies, Inc. "Thermal dissipation on a heavy compute but small device is very difficult so higher power efficiency is a must. The Snapdragon 835 processor, with our unique SoC design expertise on a 10nm process node, enables ODG to meet their design goals and develop lighter, smaller and sleeker smartglasses that take advantage of the new processor’s superior performance and power efficiency."
The R-9 smartglasses
The Snapdragon-powered R-8 smartglasses are "lighter, smaller and sleeker than any other device in ODG’s portfolio", which should make their use a more attractive option for those interested in AR, VR, and Mixed Reality overlay capabilities. For their part the larger R-9 smartglasses are "based on ODG’s award-winning 50° FOV and 1080p Project Horizon platform". The company's previous smartglasses, the R-7, were powered by a Snapdragon 801 SoC.
Follow all of our coverage of the show at https://pcper.com/ces!
Subject: Processors, Mobile | October 18, 2016 - 11:32 AM | Sebastian Peak
Tagged: SoC, Snapdragon 653, Snapdragon 626, Snapdragon 427, snapdragon, smartphone, qualcomm, mobile
Qualcomm has announced new 400 and 600-series Snapdragon parts, and these new SoCs (Snapdragon 653, 626, and 427) inherit technology found previously on the 800-series parts, including fast LTE connectivity and dual-camera support.
The integrated LTE modem has been significantly for each of these SoCs, and Qualcomm lists these features for each of the new products:
- X9 LTE with CAT 7 modem (300Mbps DL; 150Mbps UL) designed to provide users with a 50 percent increase in maximum uplink speeds over the X8 LTE modem.
- LTE Advanced Carrier Aggregation with up to 2x20 MHz in the downlink and uplink
- Support for 64-QAM in the uplink
- Superior call clarity and higher call reliability with the Enhanced Voice Services (EVS) codec on VoLTE calls.
In addition to the new X9 modem, all three SoCs offer faster CPU and GPU performance, with the Snapdragon 653 (which replaces the 652) now supporting up to 8GB of memory - up from a max of 4GB previously. Each of the new SoCs also feature Qualcomm's Quick Charge 3.0 for fast charging.
Full specifications for these new products can be found on the updated Snapdragon product page.
Availability of the new 600-series Snapdragon processors is set for the end of this year, so we could start seeing handsets with the faster parts soon; while the Snapdragon 427 is expected to ship in devices early in 2017.
Subject: Processors | October 10, 2016 - 02:25 AM | Tim Verry
Tagged: SoC, Intel, FPGA, Cortex A53, arm, Altera
Intel and recently acquired Altera have launched a new FPGA product based on Intel’s 14nm Tri-Gate process featuring an ARM CPU, 5.5 million logic element FPGA, and HBM2 memory in a single package. The Stratix 10 is aimed at data center, networking, and radar/imaging customers.
The Stratix 10 is an Altera-designed FPGA (field programmable gate array) with 5.5 million logic elements and a new HyperFlex architecture that optimizes registers, pipeline, and critical pathing (feed-forward designs) to increase core performance and increase the logic density by five times that of previous products. Further, the upcoming FPGA SoC reportedly can run at twice the core performance of Stratix V or use up to 70% less power than its predecessor at the same performance level.
The increases in logic density, clockspeed, and power efficiency are a combination of the improved architecture and Intel’s 14nm FinFET (Tri-Gate) manufacturing process.
Intel rates the FPGA at 10 TFLOPS of single precision floating point DSP performance and 80 GFLOPS/watt.
Interestingly, Intel is using an ARM processor to feed data to the FPGA chip rather than its own Quark or Atom processors. Specifically, the Stratix 10 uses an ARM CPU with four Cortex A53 cores as well as four stacks of on package HBM2 memory with 1TB/s of bandwidth to feed data to the FPGA. There is also a “secure device manager” to ensure data integrity and security.
The Stratix 10 is aimed at data centers and will be used with in specialized tasks that demand high throughput and low latency. According to Intel, the processor is a good candidate for co-processors to offload and accelerate encryption/decryption, compression/de-compression, or Hadoop tasks. It can also be used to power specialized storage controllers and networking equipment.
Intel has started sampling the new chip to potential customers.
In general, FPGAs are great at highly parallelized workloads and are able to efficiently take huge amounts of inputs and process the data in parallel through custom programmed logic gates. An FPGA is essentially a program in hardware that can be rewired in the field (though depending on the chip it is not necessarily a “fast” process and it can take hours or longer to switch things up heh). These processors are used in medical and imaging devices, high frequency trading hardware, networking equipment, signal intelligence (cell towers, radar, guidance, ect), bitcoin mining (though ASICs stole the show a few years ago), and even password cracking. They can be almost anything you want which gives them an advantage over traditional CPUs and graphics cards though cost and increased coding complexity are prohibitive.
The Stratix 10 stood out as interesting to me because of its claimed 10 TFLOPS of single precision performance which is reportedly the important metric when it comes to training neural networks. In fact, Microsoft recently began deploying FPGAs across its Azure cloud computing platform and plans to build the “world’s fastest AI supercomputer. The Redmond-based company’s Project Catapult saw the company deploy Stratix V FPGAs to nearly all of its Azure datacenters and is using the programmable silicon as part of an “acceleration fabric” in its “configurable cloud” architecture that will be used initially to accelerate the company’s Bing search and AI research efforts and later by independent customers for their own applications.
It is interesting to see Microsoft going with FPGAs especially as efforts to use GPUs for GPGPU and neural network training and inferencing duties have increased so dramatically over the years (with NVIDIA being the one pushing the latter). It may well be a good call on Microsoft’s part as it could enable better performance and researchers would be able to code their AI accelerator platforms down to the gate level to really optimize things. Using higher level languages and cheaper hardware with GPUs does have a lower barrier to entry though. I suppose ti will depend on just how much Microsoft is going to charge customers to use the FPGA-powered instances.
FPGAs are in kind of a weird middle ground and while they are definitely not a new technology, they do continue to get more complex and powerful!
What are your thoughts on Intel's new FPGA SoC?
- Microsoft Goes All in for FPGAs to Build Out AI Cloud
- Microsoft Focusing Efforts, Forming AI and Research Group
- Stratix 10 Architecture Video
- Are FPGAs the future of password cracking and supercomputing?
Subject: Processors | October 1, 2016 - 06:11 PM | Tim Verry
Tagged: xavier, Volta, tegra, SoC, nvidia, machine learning, gpu, drive px 2, deep neural network, deep learning
Earlier this week at its first GTC Europe event in Amsterdam, NVIDIA CEO Jen-Hsun Huang teased a new SoC code-named Xavier that will be used in self-driving cars and feature the company's newest custom ARM CPU cores and Volta GPU. The new chip will begin sampling at the end of 2017 with product releases using the future Tegra (if they keep that name) processor as soon as 2018.
NVIDIA's Xavier is promised to be the successor to the company's Drive PX 2 system which uses two Tegra X2 SoCs and two discrete Pascal MXM GPUs on a single water cooled platform. These claims are even more impressive when considering that NVIDIA is not only promising to replace the four processors but it will reportedly do that at 20W – less than a tenth of the TDP!
The company has not revealed all the nitty-gritty details, but they did tease out a few bits of information. The new processor will feature 7 billion transistors and will be based on a refined 16nm FinFET process while consuming a mere 20W. It can process two 8k HDR video streams and can hit 20 TOPS (NVIDIA's own rating for deep learning int(8) operations).
Specifically, NVIDIA claims that the Xavier SoC will use eight custom ARMv8 (64-bit) CPU cores (it is unclear whether these cores will be a refined Denver architecture or something else) and a GPU based on its upcoming Volta architecture with 512 CUDA cores. Also, in an interesting twist, NVIDIA is including a "Computer Vision Accelerator" on the SoC as well though the company did not go into many details. This bit of silicon may explain how the ~300mm2 die with 7 billion transistors is able to match the 7.2 billion transistor Pascal-based Telsa P4 (2560 CUDA cores) graphics card at deep learning (tera-operations per second) tasks. Of course in addition to the incremental improvements by moving to Volta and a new ARMv8 CPU architectures on a refined 16nm FF+ process.
|Drive PX||Drive PX 2||NVIDIA Xavier||Tesla P4|
|CPU||2 x Tegra X1 (8 x A57 total)||2 x Tegra X2 (8 x A57 + 4 x Denver total)||1 x Xavier SoC (8 x Custom ARM + 1 x CVA)||N/A|
|GPU||2 x Tegra X1 (Maxwell) (512 CUDA cores total||2 x Tegra X2 GPUs + 2 x Pascal GPUs||1 x Xavier SoC GPU (Volta) (512 CUDA Cores)||2560 CUDA Cores (Pascal)|
|TFLOPS||2.3 TFLOPS||8 TFLOPS||?||5.5 TFLOPS|
|DL TOPS||?||24 TOPS||20 TOPS||22 TOPS|
|TDP||~30W (2 x 15W)||250W||20W||up to 75W|
|Process Tech||20nm||16nm FinFET||16nm FinFET+||16nm FinFET|
|Transistors||?||?||7 billion||7.2 billion|
For comparison, the currently available Tesla P4 based on its Pascal architecture has a TDP of up to 75W and is rated at 22 TOPs. This would suggest that Volta is a much more efficient architecture (at least for deep learning and half precision)! I am not sure how NVIDIA is able to match its GP104 with only 512 Volta CUDA cores though their definition of a "core" could have changed and/or the CVA processor may be responsible for closing that gap. Unfortunately, NVIDIA did not disclose what it rates the Xavier at in TFLOPS so it is difficult to compare and it may not match GP104 at higher precision workloads. It could be wholly optimized for int(8) operations rather than floating point performance. Beyond that I will let Scott dive into those particulars once we have more information!
Xavier is more of a teaser than anything and the chip could very well change dramatically and/or not hit the claimed performance targets. Still, it sounds promising and it is always nice to speculate over road maps. It is an intriguing chip and I am ready for more details, especially on the Volta GPU and just what exactly that Computer Vision Accelerator is (and will it be easy to program for?). I am a big fan of the "self-driving car" and I hope that it succeeds. It certainly looks to continue as Tesla, VW, BMW, and other automakers continue to push the envelope of what is possible and plan future cars that will include smart driving assists and even cars that can drive themselves. The more local computing power we can throw at automobiles the better and while massive datacenters can be used to train the neural networks, local hardware to run and make decisions are necessary (you don't want internet latency contributing to the decision of whether to brake or not!).
I hope that NVIDIA's self-proclaimed "AI Supercomputer" turns out to be at least close to the performance they claim! Stay tuned for more information as it gets closer to launch (hopefully more details will emerge at GTC 2017 in the US).
What are your thoughts on Xavier and the whole self-driving car future?
- NVIDIA Teases Xavier, a High-Performance ARM SoC for Drive PX & AI @ AnandTech
- Tegra Related News @ PC Perspective
- Tesla P4 Specifications @ NVIDIA
- CES 2016: NVIDIA Launches DRIVE PX 2 With Dual Pascal GPUs Driving A Deep Neural Network @ PC Perspective
Subject: Processors, Mobile | August 31, 2016 - 07:30 AM | Sebastian Peak
Tagged: SoC, Snapdragon 821, snapdragon, SD821, qualcomm, processor, mobile, adreno
Qualcomm has officially launched the Snapdragon 821 SoC, an upgraded successor to the existing Snapdragon 820 found in such phones as the Samsung Galaxy S7.
"With Snapdragon 820 already powering many of the premier flagship Android smartphones today, Snapdragon 821 is now poised to become the processor of choice for leading smartphones and devices for this year’s holiday season. Qualcomm Technologies’ engineers have improved Snapdragon 821 in three key areas to ensure Snapdragon 821 maintains the level of industry leadership introduced by its predecessor."
Specifications were previously revealed when the Snapdragon 821 was announced in July, with a 10% increase on the CPU clocks (2.4 GHz, up from the previous 2.2 GHz max frequency). The Adreno 530 GPU clock increases 5%, to 650 MHz from 624 MHz. In addition to improved performance from CPU and GPU clock speed increases, the SD821 is said to offer lower power consumption (estimated at 5% compared to the SD820), and offers new functionality including improved auto-focus capability.
Enhanced overall user experience:
The Snapdragon 821 has been specifically tuned to support a more responsive user experience when compared with the 820, including:
- Shorter boot times: Snapdragon 821 powered devices can boot up to 10 percent faster.
- Faster application launch times: Snapdragon 821 can reduce app load times by up to 10 percent.
- Smoother, more responsive user interactions: UI optimizations and performance enhancements designed to allow users to enjoy smoother scrolling and more responsive browsing performance.
Improved performance and power consumption:
- CPU speeds increase: As we previously announced, the 821 features Qualcomm Kryo CPU speeds up to 2.4GHz, representing an up to 10 percent improvement in performance over Snapdragon 820.
- GPU speeds increase: The Qualcomm Adreno GPU received a 5 percent speed increase over Snapdragon 820.
- Power savings: The 821 is engineered to deliver an incremental 5 percent power savings when comparing standard use case models. This power savings can extend battery life and support OEMs interested in reducing battery size for slimmer phones.
New features and functionality:
- Snapdragon 821 introduces several new features and capabilities, offering OEMs new options to create more immersive and engaging user experiences, including support for:
- Snapdragon VR SDK (Software Development Kit): Offers developers a superior mobile VR toolset, provides compatibility with the Google Daydream platform, and access to Snapdragon 821’s powerful heterogeneous architecture. Snapdragon VR SDK supports a superior level of visual and audio quality and more immersive virtual reality and gaming experiences in a mobile environment.
- Dual PD (PDAF): Offers significantly faster image autofocus speeds under a wide variety of conditions when compared to single PDAF solutions.
- Extended Laser Auto-Focus Ranging: Extends the visible focusing range, improving laser focal accuracy over Snapdragon 820.
- Android Nougat OS: Snapdragon 821 (as well as the 820) will support the latest Android operating system when available, offering new features, expanded compatibility, and additional security compared to prior Android versions.
Qualcomm says the ASUS ZenFone 3 Deluxe is the first phone to use this new Snapdragon 821 SoC while other OEMs will be working on designs implementing the upgraded SoC.
Subject: General Tech | August 24, 2016 - 04:15 PM | Sebastian Peak
Tagged: utilities, SoC, snapdragon, Smart Ballpark, San Diego, qualcomm, Padres, OSIsoft, iot, industrial, baseball
Ever wonder how efficiently a major venue operates when it's only full of fans on game days? It turns out they don't operate all that efficiently, and the overhead is very expensive. This is where Qualcomm and OSIsoft step in, collaborating on a new “Smart Ballpark” project for San Diego's Petco Park.
“The San Diego Padres are utilizing edge intelligence gateways, powered by Qualcomm Snapdragon processors, to collect data from critical infrastructure systems and stream it in real-time to OSIsoft’s PI System in order to monitor utilities, improve operating efficiencies and drive sustainability across the team’s entire Petco Park ballpark.”
With usage monitoring for utilities (electrical and gas energy, potable and non-potable water) the Padres - San Diego’s Major League Baseball team that calls Petco Park home - see the potential to save more than 25% in the next five years.
“The edge intelligence gateways, using Snapdragon processors, connect to sensors and legacy systems throughout the ballpark using a broad range of communication methods, including wired and wireless technologies, analog and digital inputs and multiple communication protocols. These edge intelligence gateways acquire, store and stream data in real-time to the OSIsoft PI System which then presents the data to the Padres’ facilities managers using OSIsoft’s Visualization Suite and analytics, providing the operations team with deep situational awareness of everything happening in the venue.”
This is a mammoth implementation of IoT (Internet of Things), with OSIsoft’s PI system a major player on the industrial side. Qualcomm naturally needs no introduction, as the smartphone SoC maker found in so many devices across virtually all brands. Qualcomm has also worked on improving mobile data performance in large venues such as ballparks, with products like the X16 modem (expected in products starting in the second half of 2016) offering improved connections via carrier and link aggregation, and use of unlicensed spectrum.
Full press release after the break:
Subject: General Tech | August 18, 2016 - 02:20 PM | Jeremy Hellstrom
Tagged: Intel, joule, iot, IDF 2016, SoC, 570x, 550x, Intel RealSense
Intel has announced the follow up to Edison and Curie, their current SoC device, called Joule. They have moved away from the Quark processors they previously used to a current generation Atom. The device is designed to compete against NVIDIA's Jetson as it is far more powerful than a Raspberry Pi and will be destined for different usage. It will support Intel RealSense, perhaps appearing in the newly announced Project Alloy VR headset. Drop by Hack a Day for more details on the two soon to be released models, the Joule 570x and 550x.
"The high-end board in the lineup features a quad-core Intel Atom running at 2.4 GHz, 4GB of LPDDR4 RAM, 16GB of eMMC, 802.11ac, Bluetooth 4.1, USB 3.1, CSI and DSI interfaces, and multiple GPIO, I2C, and UART interfaces."
Here is some more Tech News from around the web:
- Microsoft Windows UAC can be bypassed for untraceable hacks @ The Inquirer
- Microsoft PowerShell Goes Open Source and Lands On Linux and Mac @ Slashdot
- The Witcher 3: Wild Hunt Enables NVIDIA Ansel Support For 3D Stereo Screenshots @ Techgage
- ech support scammers mess with hacker's mother, so he retaliated with ransomware @ The Register
- 90 per cent of people ignore security notices because their brains are too busy @ The Inquirer
- NikKTech With Kingston HyperX It's All About Speed Global Giveaway