Subject: General Tech | August 7, 2018 - 02:18 PM | Jeremy Hellstrom
Tagged: amd, EPYC, Intel, market share, server
AMD is continuing to see success in the server room, grabbing a bit more market share from Intel this quarter. The estimated revenue was $57.66m in the Q2 2018 whereas Q1 was $36m, as far as actual market share, AMD has increased their slice of the pie by 1.3% versus an increase of 0.5% this time last year. AMD is hopeful they can reach 5% by the end of the year; The Register notes that 2.1% or so would be more in line with the current trend. Regardless this is great news for AMD and indicates the attractiveness of EPYC for those companies looking for server upgrades.
"Aaron Rakers, senior analyst at Wells Fargo, has seen the second 2018 quarter numbers. He told The Register: "Intel's server CPU share is estimated to have dec lined to 98.7 per cent vs 99 per cent in the prior period and 99.5 per cent a year ago."
Here is some more Tech News from around the web:
- AMD's second-generation Ryzen Threadripper CPUs revealed @ The Tech Report
- AMD Ryzen Threadripper 2990WX & 2950X Unboxing @ [H]ard|OCP
- AMD unveils 'record breaking' Threadripper 2 CPUs with sights set on Intel @ The Inquirer
- Threadripper 2950X and 2990WX (specs and unboxing) @ Guru of 3D
- Microsoft U-turn sees Skype Classic given a reprieve (for the moment) @ The Inquirer
- Palm-branded Smartphones Could Return This Year @ Slashdot
- NAND we'll send foreign tech packing, says China of Xtacking: DRAM-speed... but light on layer-stacking @ The Register
- Don’t touch that link: Machine learning and the war on phishing @ Ars Technica
- TSMC chip fab tools hit by virus, payment biz BGP hijacked, CCleaner gets weird – and more @ The Register
- TSMC says variant of WannaCry forced factory shutdown @ The Inquirer
- 12 Windows Clipboard Managers Tested @ Techspot
- Divoom Timebox Smart Music Clock Review @ NikKTech
- 60,000 board gamers, one convention hall: Gen Con 2018 in picture @ Ars Technica
- NETGEAR Nighthawk Pro Gaming XR500 Router @ TechPowerUp
Subject: General Tech | June 5, 2018 - 10:36 PM | Tim Verry
Tagged: server, EPYC, enterprise, amd
AMD started off its Computex 2018 livestream by announcing three new design wins for its EPYC server processors. Specifically, AMD's EPYC is being picked up by Cisco, HPE, and Tencent for new server products that will be aimed at heavy virtualization workloads where the physical servers will be host to many virtual machines used for all manner of enterprise applications in the both private and public clouds.
Specifically, AMD notes that Cisco will be using EPYC in a new UCS solution where AMD notes that EPYC offers up 128% more cores, 50% more servers, and 20% more storage per rack than the competition. Cisco's Unified Computing System (UCS) is a high performance converged platform that combines servers, networking, storage, and management together into a rack-able solution that is all interconnected by a Cisco fabric.
HPE (the enterprise focused spin off from HP) is also adopting EPYC with the announcement today of its first AMD EPYC powered single socket Proliant server: the HPE Proliant DL325 Gen 10. AMD claims its EPYC processors (up to 32 cores / 64 threads) offers up to 25% lower cost per VM than the leading dual socket competitor. In the datacenter world TCO (total cost of ownership) is king and EPYC does have a core count advantage over Intel in this space.
Finally, AMD announced that China-based Tencent SA1 cloud service will begin offering AMD EPYC powered instances as soon as today with EPYC offering up to 30% lower cost per VM to Tencent.
AMD did not go into more specifics on the announcements, but it is nice to see EPYC getting some design wins. If you are still awake at this time, you can catch the AMD livestream on Youtube here. Here is what you have to look forward to according to AMD CEO Lisa Su: AMD Vega graphics, FreeSync, Ryzen, Threadripper 2, and 7nm Radeon Vega GPUs.
Subject: Processors | May 16, 2017 - 06:49 PM | Sebastian Peak
Tagged: Zen, server, ryzen, processor, EPYC, datacenter, cpu, amd, 64 thread, 32 core
AMD has announced their new datacenter CPU built on the Zen architecture, which the company is calling EPYC. And epic they are, as these server processors will be offered with up to 32 cores and 64 threads, 8 memory channels, and 128 PCI Express lanes per CPU.
Some of the details about the upcoming "Naples" server processors (now EPYC) were revealed by AMD back in March, when the upcoming server chips were previewed:
- A highly scalable, 32-core System on Chip (SoC) design, with support for two high-performance threads per core
- Industry-leading memory bandwidth, with 8-channels of memory per "Naples" device. In a 2-socket server, support for up to 32 DIMMS of DDR4 on 16 memory channels, delivering up to 4 terabytes of total memory capacity.
- The processor is a complete SoC with fully integrated, high-speed I/O supporting 128 lanes of PCIe, negating the need for a separate chip-set
- A highly-optimized cache structure for high-performance, energy efficient compute
- AMD Infinity Fabric coherent interconnect for two "Naples" CPUs in a 2-socket system
- Dedicated security hardware
Compared to Ryzen (or should it be RYZEN?), EPYC offers a huge jump in core count and available performance - though AMD's other CPU announcement (Threadripper) bridges the gap between the desktop and datacenter offerings with an HEDT product. This also serves to bring AMD's CPU offerings to parity with the Intel product stack with desktop/high performance desktop/server CPUs.
EPYC is a large processor. (Image credit: The Tech Report)
While specifications were not offered, there have been leaks (of course) to help fill in the blanks. Wccftech offers these specs for EPYC (on the left):
(Image credit: Wccftech)
We await further information from AMD about the EPYC launch.
Subject: General Tech | March 21, 2017 - 12:23 PM | Jeremy Hellstrom
Tagged: server, SBSA, arm
As we mentioned last week, Qualcomm's new Centriq 2400 Platform will run Microsoft server operating systems on ARM chips, however there are those who believe it is already too late for that to save Microsoft's hold on the data centre. A few years ago ARM started work on developing what they called Server Base System Architecture, essentially creating a standardized way in which any OS can communicate effectively with an ARM chip, the same sort of standardization which originally won the server room for x86 based chips. With ARM's DynamIQ Technology, which Josh discusses in depth, just around the corner their hardware is also becoming more attractive. Pop by The Register for more details on this possible industry sea change.
"Cutting to the heart of it, it doesn't actually matter if Microsoft releases Windows Server for ARM. Windows isn't the future and even Microsoft knows it. The upcoming availability of SQL server on Linux is all the proof we need that the game is over and, in the data centre at least, Microsoft didn't win."
Here is some more Tech News from around the web:
- AMD said to be planning 'behemoth' 16-core, 32-thread Ryzen CPU @ The Inquirer
- Microsoft Edge InPrivate photos can be easily recovered with freeware @ The Inquirer
- This Wii emulator lets you buy actual games from Nintendo’s Shop Channel @ Ars Technica
- BlackBerry admits dying BB10 is in pain @ The Register
- ‘Porn for Geeks’ producer on why the Digital Economy Bill will kill British business @ Kitguru
- TRENDnet TEW-827DRU AC2600 StreamBoost MU-MIMO WiFi Router Review @ NikKTech
- The GAMDIAS Hermes E1 Combo Giveaway Contest @ Tech ARP
Subject: Processors | March 7, 2017 - 09:02 AM | Tim Verry
Tagged: SoC, server, ryzen, opteron, Naples, HPC, amd
Over the summer, AMD introduced its Naples platform which is the server-focused implementation of the Zen microarchitecture in a SoC (System On a Chip) package. The company showed off a prototype dual socket Naples system and bits of information leaked onto the Internet, but for the most part news has been quiet on this front (whereas there were quite a few leaks of Ryzen which is AMD's desktop implementation of Zen).
The wait seems to be finally over, and AMD appears ready to talk more about Naples which will reportedly launch in the second quarter of this year (Q2'17) with full availability of processors and motherboards from OEMs and channel partners (e.g. system integrators) happening in the second half of 2017. Per AMD, "Naples" processors are SoCs with 32 cores and 64 threads that support 8 memory channels and a (theoretical) maximum of 2TB DDR4-2667. (Using the 16GB DIMMs available today, Naples support 256GB of DDR4 per socket.) Further, the Naples SoC features 64 PCI-E 3.0 lanes. Rumors also indicated that the SoC included support for sixteen 10GbE interfaces, but AMD has yet to confirm this or the number of SATA/SAS ports offered. AMD did say that Naples has an optimized cache structure for HPC compute and "dedicated security hardware" though it did not go into specifics. (The security hardware may be similar to the ARM TrustZone technology it has used in the past.)
Naples will be offered in single and dual socket designs with dual socket systems offering up 64 cores, 128 threads, 32 DDR4 DIMMs (512 GB using 16 GB modules) on 16 total memory channels with 21.3 GB/s per channel bandwidth (170.7 GB/s per SoC), 128 PCI-E 3.0 lanes, and an AMD Infinity Fabric interconnect between the two processor sockets.
AMD claims that its Naples platform offers up to 45% more cores, 122% more memory bandwidth, and 60% more I/O than its competition. For its internal comparison, AMD chose the Intel Xeon E5-2699A V4 which is the processor with highest core count that is intended for dual socket systems (there are E7s with more cores but those are in 4P systems). The Intel Xeon E5-2699A V4 system is a 14nm 22 core (44 thread) processor clocked at 2.4 GHz base to 3.6 GHz turbo with 55MB cache. It supports four channels of DDR4-2400 for a maximum bandwidth of 76.8 GB/s (19.2 GB/s per channel) as well as 40 PCI-E 3.0 lanes. A dual socket system with two of those Xeons features 44 cores, 88 threads, and a theoretical maximum of 1.54 TB of ECC RAM.
AMD's reference platform with two 32 core Naples SoCs and 512 GB DDR4 2400 MHz was purportedly 2.5x faster at the seismic analysis workload than the dual Xeon E5-2699A V4 OEM system with 1866 MHz DDR4. Curiously, when AMD compared a Naples reference platform with 44 cores enabled and running 1866 MHz memory to a similarly configured Intel system the Naples platform was twice as fast. It seems that the increased number of memory channels and memory bandwidth are really helping the Naples platform pull ahead in this workload.
AMD further claims that its Naples platform is more balanced and suited to cloud computing and scientific and HPC workloads than the competition. Specifically, Forrest Norrod the Senior Vice president and General Manager of AMD's Enterprise, Embedded, and Semi-Custom Business Unit stated:
“’Naples’ represents a completely new approach to supporting the massive processing requirements of the modern datacenter. This groundbreaking system-on-chip delivers the unique high-performance features required to address highly virtualized environments, massive data sets and new, emerging workloads.”
There is no word on pricing yet, but it should be competitive with Intel's offerings (the E5-2699A V4 is $4,938). AMD will reportedly be talking data center strategy and its upcoming products during the Open Compute Summit later this week, so hopefully there will be more information released at those presentations.
(My opinions follow)
This is one area where AMD needs to come out strong with support from motherboard manufacturers, system integrators, OEM partners, and OS and software validation to succeed. Intel is not likely to take AMD encroaching on its lucrative server market share lightly, and AMD is going to have a long road ahead of it to regain the market share it once had in this area, but it does have a decent architecture on its hands to build off of with Zen and if it can secure partner support Intel is certainly going to have competition here that it has not had to face in a long time. Intel and AMD competing over the data center market is a good thing, and as both companies bring new technology to market it will trickle down into the consumer level hardware. Naples' success in the data center could mean a profitable AMD with R&D money to push Zen as far as it can – so hopefully they can pull it off.
What are your thoughts on the Naples SoC and AMD's push into the server market?
Subject: Memory | February 3, 2017 - 08:42 PM | Tim Verry
Tagged: XPoint, server, Optane, Intel Optane, Intel, big data
Last week Hexus reported that Intel has begun shipping Optane memory modules to its partners for testing. This year should see the launch of both these enterprise products designed for servers as well as tiny application accelerator M.2 solid state drives based on the Intel and Micron joint 3D memory venture. The modules that Intel is shipping are the former type of Optane memory and will be able to replace DDR4 DIMMs (RAM) with a memory solution that is not as fast but is cheaper and has much larger storage capacities. The Optane modules are designed to slot into DDR4 type memory slots on server boards. The benefit for such a product lies in big data and scientific workloads where massive datasets will be able to be held in primary memory and the processor(s) will be able to access the data sets at much lower latencies than if it had to reach out to mass storage on spinning rust or even SAS or PCI-E solid state drives. Being able to hold all the data being worked on in one pool of memory will be cheaper with Optane as well as it is allegedly priced closer to NAND than RAM and the cost of RAM adds up extremely quickly when you need many terabytes of it (or more!). Various technologies attempting to bring higher capacity non volatile and/or flash-based storage in memory module form have been theorized or in the works in various forms for years now, but it appears that Intel will be the first ones to roll out actual products.
It will likely be years before the technology trickles down to consumer desktops and notebooks, so slapping what would effectively be a cheap RAM disk into your PC is still a ways out. Consumers will get a small taste of the Optane memory in the form of tiny storage drives that were rumored for a first quarter 2017 release following its Kaby Lake Z270 motherboards. Previous leaks suggest that the Intel Optane Memory 8000P would come in 16 GB and 32 GB capacities in a M.2 form factor. With a single 128-bit (16 GB) die Intel is able to hit speeds that current NAND flash based SSDs can only hit with multiple dies. Specifically the 16GB Optane application accelerator drive is allegedly capable of 285,000 random 4K IOPS, 70,000 random write 4K IOPS, Sequential 128K reads of 1400 MB/s, and sequential 128K writes of 300 MB/s. The 32GB Optane drive is a bit faster at 300,000 4K IOPS, 120,000 4K IOPS, 1600 MB/s, and 500 MB/s respectively.
Unfortunately, I do not have any numbers on how fast the Optane memory that will slot into the DDR4 slots will be, but seeing as two dies already max out the x2 PCI-E link they use in the M.2 Optane SSD, a dual sided memory module packed with rows of Optane dies on the significantly wider memory bus is very promising. It should lie somewhere closer to (but slower than) DDR4 but much faster than NAND flash while still being non volatile (it doesn't need constant power to retain the data).
I am interested to see what the final numbers are for Intel's Optane RAM and Optane storage drives. The company has certainly dialed down the hype for the technology as it approached fruition though that may be more to do with what they are able to do right now versus what the 3D XPoint memory technology itself is potentially capable of enabling. I look forward to what it will enable in the HPC market and eventually what will be possible for the desktop and gaming markets.
What are your thoughts on Intel and Micron's 3D XPoint memory and Intel's Optane implementation (Micron's implementation is QuantX)?
- IDF 2016: Intel To Demo Optane XPoint, Announces Optane Testbed for Enterprise Customers
- Intel Optane (XPoint) First Gen Product Specifications Leaked
- Intel Z270 Express and H270 Express Chipsets Support Kaby Lake, More PCI-E 3.0 Lanes
Subject: General Tech | December 7, 2016 - 01:25 PM | Jeremy Hellstrom
Tagged: qualcomm, centriq, centriq 2400, server
The days when AMD and Intel were the two choices to build a server with are long gone. The ARM architecture has been making serious inroads as various vendors have begun to offer various solutions utilizing ARM designs, up to and including AMD for that matter. Today, Qualcomm have joined these ranks, announcing their first processor family designed to power a server. The Centriq 2400 series is based on a 10nm process node, with up to 48 cores. As The Inquirer points out, this is a rather impressive shot across Intel's bow as Qualcomm will ship a 10nm FinFET before Intel does.
"The Qualcomm Centriq 2400 series, the first in the Centriq product family that Qualcomm has been working on for four years, has up to 48 ARMv8-compliant cores targeting compute-intensive data centre applications that require power efficiency and is built on the 10nm FinFET manufacturing processor."
Here is some more Tech News from around the web:
- Broadcom quietly dismantles its 'Vulcan' ARM server chip project @ The Register
- Sony kills off secret backdoor in 80 internet-connected CCTV models @ The Register
- Mikko Hypponen On The Death Of Antivirus @ Tech ARP
- Christmas 2016 Mega Worldwide Giveaway @ NikKTech
Clean Sheet and New Focus
It is no secret that AMD has been struggling for some time. The company has had success through the years, but it seems that the last decade has been somewhat bleak in terms of competitive advantages. The company has certainly made an impact in throughout the decades with their 486 products, K6, the original Athlon, and the industry changing Athlon 64. Since that time we have had a couple of bright spots with the Phenom II being far more competitive than expected, and the introduction of very solid graphics performance in their APUs.
Sadly for AMD their investment in the “Bulldozer” architecture was misplaced for where the industry was heading. While we certainly see far more software support for multi-threaded CPUs, IPC is still extremely important for most workloads. The original Bulldozer was somewhat rushed to market and was not fully optimized, while the “Piledriver” based Vishera products fixed many of these issues we have not seen the non-APU products updated to the latest Steamroller and Excavator architectures. The non-APU desktop market has been served for the past four years with 32nm PD-SOI based parts that utilize a rebranded chipset base that has not changed since 2010.
Four years ago AMD decided to change course entirely with their desktop and server CPUs. Instead of evolving the “Bulldozer” style architecture featuring CMT (Core Multi-Threading) they were going to do a clean sheet design that focused on efficiency, IPC, and scalability. While Bulldozer certainly could scale the thread count fairly effectively, the overall performance targets and clockspeeds needed to compete with Intel were just not feasible considering the challenges of process technology. AMD brought back Jim Keller to lead this effort, an industry veteran with a huge amount of experience across multiple architectures. Zen was born.
Hot Chips 28
This year’s Hot Chips is the first deep dive that we have received about the features of the Zen architecture. Mike Clark is taking us through all of the changes and advances that we can expect with the upcoming Zen products.
Zen is a clean sheet design that borrows very little from previous architectures. This is not to say that concepts that worked well in previous architectures were not revisited and optimized, but the overall floorplan has changed dramatically from what we have seen in the past. AMD did not stand still with their Bulldozer products, and the latest Excavator core does improve upon the power consumption and performance of the original. This evolution was simply not enough considering market pressures and Intel’s steady improvement of their core architecture year upon year. Zen was designed to significantly improve IPC and AMD claims that this product has a whopping 40% increase in IPC (instructions per clock) from the latest Excavator core.
AMD also has focused on scaling the Zen architecture from low power envelopes up to server level TDPs. The company looks to have pushed down the top end power envelope of Zen from the 125+ watts of Bulldozer/Vishera into the more acceptable 95 to 100 watt range. This also has allowed them to scale Zen down to the 15 to 25 watt TDP levels without sacrificing performance or overall efficiency. Most architectures have sweet spots where they tend to perform best. Vishera for example could scale nicely from 95 to 220 watts, but the design did not translate well into sub-65 watt envelopes. Excavator based “Carrizo” products on the other hand could scale from 15 watts to 65 watts without real problems, but became terribly inefficient above 65 watts with increased clockspeeds. Zen looks to address these differences by being able to scale from sub-25 watt TDPs up to 95 or 100. In theory this should allow AMD to simplify their product stack by offering a common architecture across multiple platforms.
Subject: Storage | August 11, 2016 - 10:59 AM | Allyn Malventano
Tagged: FMS, SYS-2028U-TN24R4T+, SYS-1028U-TN10RT+, supermicro, SSG-2028R-NR48N, server, NVMe, FMS 2016
Supermicro was at FMS 2016, showing off some of their NVMe chassis:
The first model is the SYS-1028U-TN10RT+. This 1U chassis lets you hot swap 10 2.5" U.2 SSDs, connecting all lanes directly to the host CPUs.
Supermicro's custom PCB and interposer links all 40 PCIe lanes to the motherboard / CPUs.
Need more drives installed? Next up is the SYS-2028U-TN24R4T+, which uses a pair of PCIe switches to connect 24 U.2 SSDs to the same pair of CPUs.
Need EVEN MORE drives installed? The SSG-2028R-NR48N uses multiple switches to connect 48 U.2 SSDs in a single 2U chassis! While the switches will limit the ultimate sequential throughput of the whole package to PCIe 3.0 x40, we know that when it comes to spreading workloads across multiple SSDs, bandwidth bottlenecks are not the whole story, as latency is greatly reduced for a given workload. With a fast set of U.2 parts installed in this chassis, the raw IOPS performance would likely saturate all threads / cores of the installed Xeons before it saturated the PCIe bus!
More to follow as we wrap up FMS 2016!
Subject: General Tech | December 11, 2015 - 12:16 PM | Jeremy Hellstrom
Tagged: server, qualcomm
AMD and Intel have been fighting it out in the server room for a while and have had to shift their tactics towards more efficient processors which merely sip at power compared to the first decade of this century. Coming from the other direction IBM and ARM design teams have been increasing the power of their chips and their ability to work together to match AMD and Intel's performance while still trying to maintain a lead on power efficiency. Now, according to what DigiTimes has been hearing, Qualcomm is ready to take advantage of its ARM license to officially move into the server market. Their initial design will sport 24 cores, provide support for VM environments and will be Linux compatible. Keep an eye on Xilinx and Mellanox Technologies as they were the companies who have announced plans to release products based on Qualcomm's designs.
"Qualcomm, which announced plans to begin developing ARM-based chips for servers in November 2014, has started delivering server-use CPU samples to potential clients and has also set up a company in Guizhou, China to promote the CPUs exclusively."
Here is some more Tech News from around the web:
- NVIDIA Iray “Predictive Design” Demo On Shield Tablet @ Tech ARP
- All eyes on the jailbroken as iOS, Mac OS X threat level ratchets up @ The Register
- Steam Escrow System Drives Impatient Users To Fake Trading Sites Serving Malware @ Slashdot
- Adobe Flash Player update includes 79 fixes, for crying out loud @ The Inquirer
- Google cloaks Android in Red Screen of malware Dearth @ The Register
- Facebook plans to open source its next-gen machine learning system @ The Inquirer