Subject: Storage | March 26, 2015 - 02:12 PM | Sebastian Peak
Tagged: storage, ssd, planar, nand, micron, M.2, Intel, imft, floating-gate, 3d nand
Intel and Micron are jointly announcing new 3D NAND technology that will radically increase solid-storage capacity going forward. The companies have indicated that moving to this technology will allow for the type of rapid increases in capacity that are consistent with Moore’s Law.
The way Intel and Micron are approaching 3D NAND is very different from existing 3D technologies from Samsung and now Toshiba. The implementation of floating-gate technology and “unique design choices” has produced startling densities of 256 Gb MLC, and a whopping 384 Gb with TLC. The choice to base this new 3D NAND on floating-gate technology allows development with a well-known entity, and benefits from the knowledge base that Intel and Micron have working with this technology on planar NAND over their long partnership.
What does this mean for consumers? This new 3D NAND enables greater than 10TB capacity on a standard 2.5” SSD, and 3.5TB on M.2 form-factor drives. These capacities are possible with the industry’s highest density 3D NAND, as the >3.5TB M.2 capacity can be achieved with just 5 packages of 16 stacked dies with 384 Gb TLC.
A 3D NAND cross section from Allyn's Samsung 850 Pro review
While such high density might suggest reliance on ever-shrinking process technology (and the inherent loss of durability thus associated) Intel is likely using a larger process for this NAND. Though they would not comment on this, Intel could be using something roughly equivalent to 50nm flash with this new 3D NAND. In the past die shrinks have been used to increase capacity per die (and yields) such as IMFT's move to 20nm back in 2011, but with the ability to achieve greater capacity vertically using 3D cell technology a smaller process is not necessary to achieve greater density. Additionally, working with a larger process would allow for better endurance as, for example, 50nm MLC was on the order of 10,000 program/erase cycles. Samsung similarly moved to a larger process with with their initial 3D NAND, moving from their existing 20nm technology back to 30nm with 3D production.
This announcement is also interesting considering Toshiba has just entered this space as well having announced 48-layer 128 Gb density 3D NAND, and like Samsung, they are moving away from floating-gate and using their own charge-trap implementation they are calling BiCS (Bit Cost Scaling). However with this Intel/Micron announcement the emphasis is on the ability to offer a 3x increase in capacity using the venerable floating-gate technology from planar NAND, which gives Intel / Micron an attractive position in the market - depending on price/performance of course. And while these very large capacity drives seem destined to be expensive at first, the cost structure is likely to be similar to current NAND. All of this remains to be seen, but this is indeed promising news for the future of flash storage as it will now scale up to (and beyond) spinning media capacity - unless 3D tech is implemented in hard drive production, that is.
So when will Intel and Micron’s new technology enter the consumer market? It could be later this year as Intel and Micron have already begun sampling the new NAND to manufacturers. Manufacturing has started in Singapore, plus ground has also been broken at the IMFT fab in Utah to support production here in the United States.