Subject: Processors | June 26, 2017 - 08:53 AM | Sebastian Peak
Tagged: xeon, Skylake, processor, pentium, microcode, kaby lake, Intel, errata, cpu, Core, 7th generation, 6th generation
A microcode bug affecting Intel Skylake and Kaby Lake processors with Hyper-Threading has been discovered by Debian developers (who describe it as "broken hyper-threading"), a month after this issue was detailed by Intel in errata updates back in May. The bug can cause the system to behave 'unpredictably' in certain situations.
"Under complex micro-architectural conditions, short loops of less than 64 instructions that use AH, BH, CH or DH registers as well as their corresponding wider register (eg RAX, EAX or AX for AH) may cause unpredictable system behaviour. This can only happen when both logical processors on the same physical processor are active."
Until motherboard vendors begin to address the bug with BIOS updates the only way to prevent the possibility of this microcode error is to disable HyperThreading. From the report at The Register (source):
"The Debian advisory says affected users need to disable hyper-threading 'immediately' in their BIOS or UEFI settings, because the processors can 'dangerously misbehave when hyper-threading is enabled.' Symptoms can include 'application and system misbehaviour, data corruption, and data loss'."
The affected models are 6th and 7th-gen Intel processors with HyperThreading, which include Core CPUs as well as some Pentiums, and Xeon v5 and v6 processors.
Subject: General Tech | January 14, 2015 - 12:32 PM | Jeremy Hellstrom
Tagged: history, cpu, errata, dan luu
A question was asked of Dan Luu about what new tricks silicon has learned since the early days of the eighties. The answer covers a gamut of what tools those who work on low level code such as drivers and UEFI/BIOS now have at their disposal. It is far more than just the fact that we have grown from 8 bit to 64 bit or the frequencies possible now that were undreamed of before but delves into the newer features such as out of order instructions and single instruction, multiple data instructions. If you are not familiar with how CPUs and GPGPUs operate at these low levels it is a great jumping off point for you to learn what the features are called and to get a rough idea of what tasks they perform. If you know your silicon through and through it is a nice look back at what has been added in the last 25 years and a reminder of what you had to work without back in the days when flashing a BIOS was a literal thing. You can also check the comments below the links at Slashdot as they are uncharacteristically on topic.
"An article by Dan Luu answers this question and provides a good overview of various cool tricks modern CPUs can perform. The slightly older presentation Compiler++ by Jim Radigan also gives some insight on how C++ translates to modern instruction sets."
Here is some more Tech News from around the web:
- CES 2015: Dell, Lenovo and HP showcase potential of Intel’s 5th-gen Core chips @ The Inquirer
- Insert 'Skeleton Key', unlock Microsoft Active Directory. Simples – hackers @ The Register
- Lego Avengers Assemble to the Helicarrier! @ Hack a Day
- TechwareLabs CES 2015 Event Coverage: Thermaltake
- Toshiba tosses out uber-slim THREE TERABYTE HDD @ The Register
- BlackBerry adopts the iPhone for promotional Twitter campaign @ The Inquirer
- The BenQ W1080ST+ & W1070+ Home Cinema Projector Launch Event @ TechARP
Subject: General Tech | August 12, 2014 - 01:07 PM | Jeremy Hellstrom
Tagged: Intel, haswell, tsx, errata
Transactional Synchronization Extensions, aka TSX, are a backwards compatible set of instructions which first appeared in some Haswell chips as a method to improve concurrency and multi-threadedness with as little work for the programmer as possible. It was intended to improve the scaling of multi-threaded apps running on multi-core processors and has not yet been widely adopted. The adoption has run into another hurdle, in some cases the use of TSX can cause critical software failures and as a result Intel will be disabling the instruction set via new BIOS/UEFI updates which will be pushed out soon. If your software uses the new instruction set and you wish it to continue to do so you should avoid updating your motherboard BIOS/UEFI and ask your users to do the same. You can read more about this bug/errata and other famous problems over at The Tech Report.
"The TSX instructions built into Intel's Haswell CPU cores haven't become widely used by everyday software just yet, but they promise to make certain types of multithreaded applications run much faster than they can today. Some of the savviest software developers are likely building TSX-enabled software right about now."
Here is some more Tech News from around the web:
- Nvidia claims Haswell-class performance for Denver CPU core
- Microsoft integrates Cortana into Windows Threshold @ The Inquirer
- AMD launches Firepro graphics updates for CAD workstations @ The Inquirer
- VicoVation Marcus 3 XHD 1296p Car Dash Camera Review @ NikKTech
- Ancient pager tech SMS: It works, it's fab, but wow, get a load of that incoming SPAM @ The Register