Subject: Storage, Shows and Expos | August 8, 2017 - 05:37 PM | Allyn Malventano
Tagged: z-ssd, vnand, V-NAND, Samsung, QLC, FMS 2017, 64-Layer, 3d, 32TB, 1Tbit
As is typically the case for Flash Memory Summit, the Samsung keynote was chock full of goodies:
Samsung kicked off by stating there are a good 5 years of revisions left in store for their V-NAND line, each with a corresponding increase in speed and capacity.
While V-NAND V4 was 64-layer TLC, V5 is a move to QLC, bringing per die capacity to 1Tbit (128 GB per die).
If you were to stack 32 of these new V5 dies per package, and do so in a large enough 2.5" housing, that brings the maximum capacity of such a device to a whopping 128TB!
Samsung also discussed a V2 of their Z-NAND, moving from SLC to MLC while only adding 2-3 us of latency per request. Z-NAND is basically a quicker version of NAND flash designed to compete with 3D XPoint.
M.2 SSDs started life with the working title of NGFF. Fed up with the limitations of this client-intended form factor for the enterprise, Samsung is pushing a slightly larger NGSFF form factor that supports higher capacities per device. Samsung claimed a PM983 NGSFF SSD will hold 16TB, a 1U chassis full of the same 576TB, and a 2U chassis pushing that figure to 1.15PB.
Last up is 'Key Value'. This approach allows the flash to be accessed more directly by the application layer, enabling more efficient use of the flash and therefore higher overall performance.
There were more points brought up that we will be covering later on, but for now here is the full press release that went out during the keynote: (after the break)
Subject: Storage | August 2, 2017 - 06:21 PM | Allyn Malventano
Tagged: western digital, wdc, WD, tlc, slc, QLC, nand, mlc, flash, 96GB, 768Gb, 3d
A month ago, WD and Toshiba each put out releases related to their BiCS 3D Flash memory. WD announced 96 layers (BiCS4) as their next capacity node, while Toshiba announced them reliably storing four bits per cell (QLC).
WD recently did their own press release related to QLC, partially mirroring Toshiba's announcement, but this one had some additional details on capacity per die, as well as stating their associated technology name used for these shifts. TLC was referred to as "X3", and "X4" is the name for their QLC tech as applied to BiCS. The WD release stated that X4 tech, applied to BiCS3, yields 768Gbit (96GB) per die vs. 512Gbit (64GB) per die for X3 (TLC). Bear in mind that while the release (and the math) states this is a 50% increase, moving from TLC to QLC with the same number of cells does only yields a 33% increase, meaning X4 BiCS3 dies need to have additional cells (and footprint) to add that extra 17%.
The release ends by hinting at X4 being applied to BiCS4 in the future, which is definitely exciting. Merging the two recently announced technologies would yield a theoretical 96-layer BiCS4 die, using X4 QLC technology, yielding 1152 Gbit (144GB) per die. A 16 die stack of which would come to 2,304 GB (1.5x the previously stated 1.5TB figure). The 2304 figure might appear incorrect but consider that we are multiplying two 'odd' capacities together (768 Gbit (1.5x512Gbit for TLC) and 96 layers (1.5x64 for X3).
Press blast appears after the break.
Subject: Storage | June 28, 2017 - 09:49 PM | Allyn Malventano
Tagged: wdc, WD, toshiba, QLC, nand, BiCS, 96-layer, 3d
A couple of announcements out of Toshiba and Western Digital today. First up is Toshiba announcing QLC (4 bit per cell) flash on their existing BiCS 3 (64-layer) technology. QLC may not be the best for endurance as the voltage tolerances become extremely tight with 16 individual voltage states per cell, but Toshiba has been working on this tech for a while now.
In the above slide from the Toshiba keynote at last year's Flash Memory Summit, we see the use case here is for 'archival grade flash', which would still offer fast reads but is not meant to be written as frequently as MLC or TLC flash. Employing QLC in Toshiba's current BiCS 3 (64-layer) flash would enable 1.5TB of storage in a 16-die stack (within one flash memory chip package).
Next up is BiCS 4, which was announced by Western Digital. We knew BiCS 4 was coming but did not know how many layers it would be. We now know that figure, and it is 96. The initial offerings will be the common 256Gbit (32GB) capacity per die, but stacking 96 cells high means the die will come in considerably smaller, meaning more per wafer, ultimately translating to lower cost per GB in your next SSD.
While these announcements are welcome, their timing and coordinated launch from both companies seems odd. Perhaps it has something to do with this?
Subject: Storage | May 29, 2017 - 11:42 PM | Allyn Malventano
Tagged: western digital, wdc, WD, Ultra, ssd, sandisk, nand, computex 2017, Blue, BiCS, 3d
Western Digital bought SanDisk nearly two years ago, but we had not really seen any products jointly launched under both brand labels. Until today:
The WD Blue 3D NAND SATA SSD and SanDisk Ultra 3D SSD are both products containing identical internals. Specifically, these are the first client SSDs built with 64-layer 3D NAND technology. Some specs:
- Sequential read: 560 MB/s
- Sequential write: 530 MB/s
- Capacity: 250GB, 500GB, 1TB, 2TB
- Form factor: 2.5" (WD and Sandisk), M.2 (SATA) 2280 (WD only)
MSRP's start at $99.99 for the 250GB models of all flavors (2.5" / M.2 SATA), and all products will ship with a 3-year warranty.
It might seem odd that we see an identical product shipped under two different brands owned by the same company, but WD is likely leveraging the large OEM relationship held by SanDisk. I'm actually curious to see how this pans out long term because it is a bit confusing at present.
Subject: Storage | August 11, 2015 - 08:40 PM | Allyn Malventano
Tagged: toshiba, ssd, FMS 2015, flash, BiCS, Archive, Archival, 3d
We occasionally throw around the '3-bit MLC' (Multi Level Cell) term in place of 'TLC' (Triple Level Cell) when talking about flash memory. Those terms are interchangeable, but some feel it is misleading as the former still contains the term MLC. At Toshiba's keynote today, they showed us why the former is important:
Photo source: Sam Chen of Custom PC Review
That's right - QLC (Quadruple Level Cell), which is also 4-bit MLC, has been mentioned by Toshiba. As you can see at the right of that slide, storing four bits in a single flash cell means there are *sixteen* very narrow voltage ranges representing the stored data. That is a very hard thing to do, and even harder to do with high performance (programming/writing would take a relatively long time as the circuitry nudges the voltages to such a precise level). This is why Toshiba pitched this flash as a low cost solution for archival purposes. You wouldn't want to use this type of flash in a device that was written constantly, since the channel materials wearing out would have a much more significant effect on endurance. Suiting this flash to be written only a few times would keep it in a 'newer' state that would be effective for solid state data archiving.
The 1x / 0.5x / 6x figures appearing in the slide are meant to compare relative endurance to Toshiba's own planar 15nm flash. The figures suggest that Toshiba's BiCS 3D flash is efficient enough to go to QLC (4-bit) levels and still maintain a higher margin than their current MLC (2-bit) 2D flash.
More to follow as we continue our Flash Memory Summit coverage!
It has become increasingly apparent that flash memory die shrinks have hit a bit of a brick wall in recent years. The issues faced by the standard 2D Planar NAND process were apparent very early on. This was no real secret - here's a slide seen at the 2009 Flash Memory Summit:
Despite this, most flash manufacturers pushed the envelope as far as they could within the limits of 2D process technology, balancing shrinks with reliability and performance. One of the largest flash manufacturers was Intel, having joined forces with Micron in a joint venture dubbed IMFT (Intel Micron Flash Technologies). Intel remained in lock-step with Micron all the way up to 20nm, but chose to hold back at the 16nm step, presumably in order to shift full focus towards alternative flash technologies. This was essentially confirmed late last week, with Intel's announcement of a shift to 3D NAND production.
Intel's press briefing seemed to focus more on cost efficiency than performance, and after reviewing the very few specs they released about this new flash, I believe we can do some theorizing as to the potential performance of this new flash memory. From the above illustration, you can see that Intel has chosen to go with the same sort of 3D technology used by Samsung - a 32 layer vertical stack of flash cells. This requires the use of an older / larger process technology, as it is too difficult to etch these holes at a 2x nm size. What keeps the die size reasonable is the fact that you get a 32x increase in bit density. Going off of a rough approximation from the above photo, imagine that 50nm die (8 Gbit), but with 32 vertical NAND layers. That would yield a 256 Gbit (32 GB) die within roughly the same footprint.
Representation of Samsung's 3D VNAND in 128Gbit and 86 Gbit variants.
20nm planar (2D) = yellow square, 16nm planar (2D) = blue square.
Image republished with permission from Schiltron Corporation.
It's likely a safe bet that IMFT flash will be going for a cost/GB far cheaper than the competing Samsung VNAND, and going with a relatively large 256 Gbit (vs. VNAND's 86 Gbit) per-die capacity is a smart move there, but let's not forget that there is a catch - write speed. Most NAND is very fast on reads, but limited on writes. Shifting from 2D to 3D NAND netted Samsung a 2x speed boost per die, and another effective 1.5x speed boost due to their choice to reduce per-die capacity from 128 Gbit to 86 Gbit. This effective speed boost came from the fact that a given VNAND SSD has 50% more dies to reach the same capacity as an SSD using 128 Gbit dies.
Now let's examine how Intel's choice of a 256 Gbit die impacts performance:
- Intel SSD 730 240GB = 16x128 Gbit 20nm dies
- 270 MB/sec writes and ~17 MB/sec/die
- Crucial MX100 128GB = 8x128Gbit 16nm dies
- 150 MB/sec writes and ~19 MB/sec/die
- Samsung 850 Pro 128GB = 12x86Gbit VNAND dies
- 470MB/sec writes and ~40 MB/sec/die
If we do some extrapolation based on the assumption that IMFT's move to 3D will net the same ~2x write speed improvement seen by Samsung, combined with their die capacity choice of 256Gbit, we get this:
- Future IMFT 128GB SSD = 4x256Gbit 3D dies
- 40 MB/sec/die x 4 dies = 160MB/sec
Even rounding up to 40 MB/sec/die, we can see that also doubling the die capacity effectively negates the performance improvement. While the IMFT flash equipped SSD will very likely be a lower cost product, it will (theoretically) see the same write speed limits seen in today's SSDs equipped with IMFT planar NAND. Now let's go one layer deeper on theoretical products and assume that Intel took the 18-channel NVMe controller from their P3700 Series and adopted it to a consumer PCIe SSD using this new 3D NAND. The larger die size limits the minimum capacity you can attain and still fully utilize their 18 channel controller, so with one die per channel, you end up with this product:
- Theoretical 18 channel IMFT PCIE 3D NAND SSD = 18x256Gbit 3D dies
- 40 MB/sec/die x 18 dies = 720 MB/sec
- 18x32GB (die capacity) = 576GB total capacity
Overprovisioning decisions aside, the above would be the lowest capacity product that could fully utilize the Intel PCIe controller. While the write performance is on the low side by PCIe SSD standards, the cost of such a product could easily be in the $0.50/GB range, or even less.
In summary, while we don't have any solid performance data, it appears that Intel's new 3D NAND is not likely to lead to a performance breakthrough in SSD speeds, but their choice on a more cost-effective per-die capacity for their new 3D NAND is likely to give them significant margins and the wiggle room to offer SSDs at a far lower cost/GB than we've seen in recent years. This may be the step that was needed to push SSD costs into a range that can truly compete with HDD technology.
Given that we are anticipating a launch of the Samsung 850 EVO very shortly, it is a good time to back fill on the complete performance picture of the 850 Pro series. We have done several full capacity roundups of various SSD models over the past months, and the common theme with all of them is that as the die count is reduced in lower capacity models, so is the parallelism that can be achieved. This effect varies based on what type of flash memory die is used, but the end result is mostly an apparent reduction in write performance. Fueling this issue is the increase in flash memory die capacity over time.
There are two different ways to counteract the effects of write speed reductions caused by larger capacity / fewer dies:
- Reduce die capacity.
- Increase write performance per die.
Recently there has been a trend towards *lower* capacity dies. Micron makes their 16nm flash in both 128Gbit and 64Gbit. Shifting back towards the 64Gbit dies in lower capacity SSD models helps them keep the die count up, increasing overall parallelism, and therefore keeping write speeds and random IO performance relatively high.
Subject: Storage | July 7, 2014 - 03:58 PM | Jeremy Hellstrom
Tagged: vertical, V-NAND, ssd, sata, Samsung, 850 PRO, 3d
As you saw in Al's review, the Samsung 850 drive is more than just a small bump in model number and performance, it is the stellar introduction to 3D NAND. The Tech Report is likely having nightmares from the drives reported longevity which is expected to be up to 10 times the cycles of current drives and means an update to their long running endurance test could see them testing into the 2020's. While they haven't yet added the 850 to that particular test they did post a review which starts out with a comprehensive look at the history of Flash technology and why 3D NAND is faster and more resilient than previous types; read on to get a better understanding of the fastest consumer SATA drive on the market.
"Most flash memory is limited to a single layer, but the V-NAND chips in Samsung's new 850 Pro SSD stack 32 layers on top of each other. This is next-level stuff, literally, and it's supposed to make the 850 Pro the fastest SATA drive around. We investigate."
Here are some more Storage reviews from around the web:
- Samsung SSD 850 PRO @ Benchmark Reviews
- Samsung SSD 850 Pro @ Legion Hardware
- Samsung 850 PRO 512GB SATA SSD @ Custom PC Review
- Samsung 850 Pro 1TB SSD Review @ Legit Reviews
- Samsung 850 Pro SSD Review - Showing Off With 3D V-NAND @ The SSD Review
- Samsung 845DC EVO 240GB SSD Review @ NikKTech
- Samsung 845DC EVO 240GB, 960GB SATA SSD @ Custom PC Review
- Crucial MX100 512GB SSD Review @ NikKTech
- OCZ RevoDrive 350 480 GB Review @ OCC
- OCZ RevoDrive 350 480GB PCIe SSD @ Custom PC Review
- ADATA XPG SX300 SATA 6Gb/s mSATA SSD Review @ Modders-Inc
- Seagate Laptop SSHD 1 TB Solid State Hybrid Drive @ TechARP
- Synology DS414slim 4-Bay NAS @ eTeknix
- OWC ThunderBay 4 RAID5 Edition Review - Speed, Capacity and Data Security @ The SSD Review
- Samsung Pro microSDXC UHS-1 U1 Card @ The SSD Review
Samsung has certainly been pushing the envelope in the SSD field. For the past two years straight, they have launched class leading storage products, frequently showing outside-the-box thinking. Their 840 PRO series was an impressive MLC performer to say the least, but even more impressive was the 840 EVO, which combined cost-efficient TLC flash with a super-fast SLC cache. The generous SLC area, present on each die and distributed amongst all flash chips within the drive, enabled the EVO to maintain PRO-level performance for the majority of typical consumer (and even power user) usage scenarios. The main win for the EVO was the fact that it could be produced at a much lower cost, and since its release, we've seen the EVO spearheading the push to lower cost SSDs.
All of these innovations might make you wonder what could possibly be next. Today I have that answer:
If you're going "Hey, they just changed the label from 840 to 850!", well, think again. This SSD might have the same MEX controller as its predecessor, but Samsung has done some significant overhauling of the flash memory itself. Allow me to demonstrate.
Here's standard (2D) flash memory, where the charge is stored on a horizontal plane:
..and now for 3D:
The charges (bits) are not stored at the top layer. They are stored within all of those smaller, thinner layers below it. You're still looking at a 2D plane (your display), so here's a better view:
Subject: General Tech | May 2, 2013 - 02:59 PM | Ken Addison
Tagged: podcast, video, Indiegogo, corair, obsidian, 350d, mATX, frame rating, 4k, titan, 7990, 690, Oculus, rift, VR, 3d, amd, amd fx, vishera, hUMA, hsa
PC Perspective Podcast #249 - 05/02/2013
Join us this week as we discuss the Corsair 350D, Frame Rating in 4K, the Oculus Rift and more!
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Hosts: Josh Walrath, Allyn Malventano, Scott Michaud and Morry Teitelman
Program length: 1:04:02
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