Intel officially ends the era of "tick-tock" processor production

Subject: Processors | March 22, 2016 - 05:08 PM |
Tagged: Intel, tick tock, tick-tock, process technology, kaby lake

It should come as little surprise to our readers that have followed news about Kaby Lake, Intel's extension of the Skylake architecture that officially broke nearly a decade of tick-tock processor design. With tick-tock, Intel would iterate in subsequent years between a new processor microarchitecture (Sandy Bridge, Ivy Bridge, etc.) and a new process technology (45nm, 32nm, 22nm, etc.). According to this story over at Fool.com, Intel's officially ending that pattern of production.

From the company's latest K-10 filing:

"We expect to lengthen the amount of time we will utilize our 14 [nanometer] and our next-generation 10 [nanometer] process technologies, further optimizing our products and process technologies while meeting the yearly market cadence for product introductions."

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It is likely that that graphic above that showcases the changes from Tick-Tock to what is going on now isn't "to scale" and we may see more than three steps in each iteration along the way. Intel still believes that it has and will continue to have the best process technology in the world and that its processors will benefit.

Continuing further, the company indicates that "this competitive advantage will be extended in the future as the costs to build leading-edge fabrication facilities increase, and as fewer semiconductor companies will be able to leverage platform design and manufacturing."

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Kaby Lake details leaking out...

As Scott pointed out in our discussions about this news, it might mean consumers will see advantages in longer socket compatibility going forward though I would still see this as a net-negative for technology. As process technology improvements slow down, either due to complexity or lack of competition in the market, we will see less innovation in key areas of performance and power consumption. 

Source: Fool.com

ARM Partners with TSMC to Produce SoCs on 7nm FinFET

Subject: Processors | March 15, 2016 - 12:52 PM |
Tagged: TSMC, SoC, servers, process technology, low power, FinFET, datacenter, cpu, arm, 7nm, 7 nm FinFET

ARM and TSMC have announced their collaboration on 7 nm FinFET process technology for future SoCs. A multi-year agreement between the companies, products produces on this 7 nm FinFET process are intended to expand ARM’s reach “beyond mobile and into next-generation networks and data centers”.

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TSMC Headquarters (Image credit: AndroidHeadlines)

So when can we expect to see 7nm SoCs on the market? The report from The Inquirer offers this quote from TSMC:

“A TSMC spokesperson told the INQUIRER in a statement: ‘Our 7nm technology development progress is on schedule. TSMC's 7nm technology development leverages our 10nm development very effectively. At the same time, 7nm offers a substantial density improvement, performance improvement and power reduction from 10nm’.”

Full press release after the break.

Source: ARM
Author:
Subject: Processors
Manufacturer: AMD

Clockspeed Jump and More!

On March 1st AMD announced the availability of two new processors as well as more information on the A10 7860 APU.

The two new units are the A10-7890K and the Athlon X4 880K.  These are both Kaveri based parts, but of course the Athlon has the GPU portion disabled.  Product refreshes for the past several years have followed a far different schedule than the days of yore.  Remember back in time when the Phenom II series and the competing Core 2 series would have clockspeed updates that were expected yearly, if not every half year with a slightly faster top end performer to garner top dollar from consumers?

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Things have changed, for better or worse.  We have so far seen two clockspeed bumps for the Kaveri /Godavari based APU.  Kaveri was first introduced over two years ago with the A10-7850K and the lower end derivatives.  The 7850K has a clockspeed that ranges from 3.7 GHz to the max 4 GHz with boost.  The GPU portion is clocked at 720 MHz.  This is a 95 watt TDP part that is one of the introductory units from GLOBALFOUNDRIES 28 nm HKMG process.

Today the new top end A10-7890K is clocked at 4.1 GHz to 4.3 GHz max.  The GPU receives a significant boost in performance with a clockspeed of 866 MHz.  The combination of CPU and GPU clockspeed increases push the total performance of the part exceeding 1 TFLOPs.  It features the same dual module/quad core Godavari design as well as the 8 GCN Units.  The interesting part here is that the APU does not exceed the 95 watt TDP that it shares with the older and slower 7850K.  It is also a boost in performance from last year’s refresh of the A10-7870K which is clocked 200 MHz slower on the CPU portion but retains the 866 MHz speed of the GPU.  This APU is fully unlocked so a user can easily overclock both the CPU and GPU cores.

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The Athlon X4 880K is still based on the Godavari family rather than the Carizzo update that the X4 845 uses.  This part is clocked from 4.0 to 4.2 GHz.  It again retains the 95 watt TDP rating of the previous Athlon X4 CPUs.  Previously the X4 860K was the highest clocked unit at 3.7 GHz to 4.0, but the 880K raises that to 4 to 4.2 GHz.  A 300 MHz gain in base clock is pretty significant as well as stretching that ceiling to 4.2 GHz.  The Godavari modules retain their full amount of L2 cache so the 880K has 4 MB available to it.  These parts are very popular with budget enthusiasts and gaming builds as they are extremely inexpensive and perform at an acceptable level with free overclocking thrown in.

Click here to read more about AMD's March 2016 Refresh!

Tesla Motors Hires Peter Bannon of Apple

Subject: Graphics Cards, Processors | February 29, 2016 - 06:48 PM |
Tagged: tesla motors, tesla, SoC, Peter Bannon, Jim Keller

When we found out that Jim Keller has joined Tesla, we were a bit confused. He is highly skilled in processor design, and he moved to a company that does not design processors. Kind of weird, right? There are two possibilities that leap to mind: either he wanted to try something new in life, and Elon Musk hired him for his general management skills, or Tesla wants to get more involved in the production of their SoCs, possibly even designing their own.

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Now Peter Bannon, who was a colleague of Jim Keller at Apple, has been hired by Tesla Motors. Chances are, the both of them were not independently interested in an abrupt career change that led them to the same company. That seems highly unlikely, to say the least. So it appears that Tesla Motors wants experienced chip designers in house. What for? We don't know. This is a lot of talent to just look over the shoulders of NVIDIA and other SoC partners, to make sure they have an upper hand in negotiation. Jim Keller is at Tesla as their “Vice-President of Autopilot Hardware Engineering.” We don't know what Peter Bannon's title will be.

And then, if Tesla Motors does get into creating their own hardware, we wonder what they will do with it. The company has a history of open development and releasing patents (etc.) into the public. That said, SoC design is a highly encumbered field, depending on what they're specifically doing, which we have no idea about.

Source: Eletrek

MWC 2016: MediaTek Announces Helio P20 True Octa-Core SoC

Subject: Processors, Mobile | February 22, 2016 - 11:11 AM |
Tagged: TSMC, SoC, octa-core, MWC 2016, MWC, mediatek, Mali-T880, LPDDR4X, Cortex-A53, big.little, arm

MediaTek might not be well-known in the United States, but the company has been working to expand from China, where it had a 40% market share as of June 2015, into the global market. While 2015 saw the introduction of the 8-core Helio P10 and the 10-core helio X20 SoCs, the company continues to expand their lineup, today announcing the Helio P20 SoC.

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There are a number of differences between the recent SoCs from MediaTek, beginning with the CPU core configuration. This new Helio P20 is a “True Octa-Core” design, but rather than a big.LITTLE configuration it’s using 8 identically-clocked ARM Cortex-A53 cores at 2.3 GHz. The previous Helio P10 used a similar CPU configuration, though clocks were limited to 2.0 GHz with that SoC. Conversely, the 10-core Helio X20 uses a tri-cluster configuration, with 2x ARM Cortex-A72 cores running at 2.5 GHz, along with a typical big.LITTLE arrangement (4x Cortex-A53 cores at 2.0 Ghz and 4x Cortex-A53 cores at 1.4 GHz).

Another change affecting MediaTek’s new SoC and he industry at large is the move to smaller process nodes. The Helio P10 was built on 28 nm HPM, and this new P20 moves to 16 nm FinFET. Just as with the Helio P10 and Helio X20 (a 20 nm part) this SoC is produced at TSMC using their 16FF+ (FinFET Plus) technology. This should provide up to “40% higher speed and 60% power saving” compared to the company’s previous 20 nm process found in the Helio X20, though of course real-world results will have to wait until handsets are available to test.

The Helio P20 also takes advantage of LPDDR4X, and is “the world’s first SoC to support low power double data rate random access memory” according to MediaTek. The company says this new memory provides “70 percent more bandwidth than the LPDDR3 and 50 percent power savings by lowering supply voltage to 0.6v”. Graphics are powered by ARM’s high-end Mali T880 GPU, clocked at an impressive 900 MHz. And all-important modem connectivity includes CAT6 LTE with 2x carrier aggregation for speeds of up to 300 Mbps down, 50 Mbps up. The Helio P20 also supports up to 4k/30 video decode with H.264/265 support, and the 12-bit dual camera ISP supports up to 24 MP sensors.

Specs from MediaTek:

  • Process: 16nm
  • Apps CPU: 8x Cortex-A53, up to 2.3GHz
  • Memory: Up to 2 x LPDDR4X 1600MHz (up to 6GB) + 1x LPDDR3 933Mhz (up to 4GB) + eMMC 5.1
  • Camera: Up to 24MP at 24FPS w/ZSD, 12bit Dual ISP, 3A HW engine, Bayer & Mono sensor support
  • Video Decode: Up to 4Kx2K 30fps H.264/265
  • Video Encode: Up to 4Kx2K 30fps H.264
  • Graphics: Mali T-880 MP2 900MHz
  • Display: FHD 1920x1080 60fps. 2x DSI for dual display
  • Modem: LTE FDD TDD R.11 Cat.6 with 2x20 CA. C2K SRLTE. L+W DSDS support
  • Connectivity: WiFiac/abgn (with MT6630). GPS/Glonass/Beidou/BT/FM.
  • Audio: 110db SNR & -95db THD

It’s interesting to see SoC makers experiment with less complex CPU designs after a generation of multi-cluster (big.LITTLE) SoCs, as even the current flagship Qualcomm SoC, the Snapdragon 820, has reverted to a straight quad-core design. The P20 is expected to be in shipping devices by the second half of 2016, and we will see how this configuration performs once some devices using this new P20 SoC are in the wild.

Full press release after the break:

Source: MediaTek

Extreme Overclocking of Skylake (7.02566 GHz)

Subject: Processors | February 6, 2016 - 09:00 PM |
Tagged: Skylake, overclocking, asrock, Intel, gskill

I recently came across a post at PC Gamer that looked at the extreme overclocking leaderboard of the Skylake-based Intel Core i7-6700K. Obviously, these competitions will probably never end as long as higher numbers are possible on parts that are interesting for one reason or another. Skylake is the new chip on the liquid nitrogen block. It cannot reach frequencies as high as its predecessors, but teams still compete to get as high as possible on that specific SKU.

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The current world record for a single-threaded Intel Core i7-6700K is 7.02566 GHz, which is achieved with a voltage of 4.032V. For comparison, the i7-6700K is typically around 1.3V at load. This record was apparently set about a month ago, on January 11th.

This is obviously a huge increase, about three-fold more voltage for the extra 3 GHz. For comparison, the current world record over all known CPUs is the AMD FX-8370 with a clock of 8.72278 GHz. Many Pentium 4-era processors make up the top 15 places too, as those parts were designed for high clock rates with relatively low IPC.

The rest of the system used G.SKILL Ripjaws 4 DDR4 RAM, an ASRock Z170M OC Formula motherboard, and an Antec 1300W power supply. It used an NVIDIA GeForce GT 630 GPU, which offloaded graphics from the integrated chip, but otherwise interfered as little as possible. They also used Windows XP, because why not I guess? I assume that it does the least amount of work to boot, allowing a quicker verification, but that is only a guess.

Source: HWBot

ASRock Releases BIOS to Disable Non-K Skylake Overclocking

Subject: Processors | February 5, 2016 - 11:44 AM |
Tagged: Intel, Skylake, overclocking, cpu, Non-K, BCLK, bios, SKY OC, asrock, Z170

ASRock's latest batch of motherboard BIOS updates remove the SKY OS function, which permitted overclocking of non-K Intel processors via BCLK (baseclock).

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The news comes amid speculation that Intel had pressured motherboard vendors to remove such functionality. Intel's unlocked K parts (i5-6600K, i7-6700K) will once again be the only options for Skylake overclocking on Z170 on ASRock boards (assuming prior BIOS versions are no longer available), and with no Pentium G3258 this generation Intel is no longer a budget friendly option for enthusiasts looking to push their CPU past factory specs.

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(Image credit: Hexus.net)

It sounds like now would be a good time to archive that SKY OS enabled BIOS update file if you've downloaded it - or simply refrain from this BIOS update. What remains to be seen of course is whether other vendors will follow suit and disable BCLK overclocking of non-K processors. This had become a popular feature on a number of Z170 motherboards on the market, but ASRock may have been in too weak a position to battle Intel on this issue.

Source: Hexus
Author:
Subject: Processors
Manufacturer: AMD

AMD Keeps Q1 Interesting

CES 2016 was not a watershed moment for AMD.  They showed off their line of current video cards and, perhaps more importantly, showed off working Polaris silicon, which will be their workhorse for 2016 in the graphics department.  They did not show off Zen, a next generation APU, or any AM4 motherboards.  The CPU and APU world was not presented in a way that was revolutionary.  What they did show off, however, hinted at the things to come to help keep AMD relevant in the desktop space.

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It was odd to see an announcement about the stock cooler that AMD was introducing, but when we learned more about it, the more important it was for AMD’s reputation moving forward.  The Wraith cooler is a new unit to help control the noise and temperatures of the latest AMD CPUs and select APUs.  This is a fairly beefy unit with a large, slow moving fan that produces very little noise.  This is a big change from the variable speed fans on previous coolers that could get rather noisy and leave temperatures that were higher in range than are comfortable.  There has been some derision aimed at AMD for providing “just a cooler” for their top end products, but it is a push that is making them more user and enthusiast friendly without breaking the bank.

Socket AM3+ is not dead yet.  Though we have been commenting on the health of the platform for some time, AMD and its partners work to improve and iterate upon these products to include technologies such as USB 3.1 and M.2 support.  While these chipsets are limited to PCI-E 2.0 speeds, the four lanes available to most M.2 controllers allows these boards to provide enough bandwidth to fully utilize the latest NVMe based M.2 drives available.  We likely will not see a faster refresh on AM3+, but we will see new SKUs utilizing the Wraith cooler as well as a price break for the processors that exist in this socket.

Click here to continue reading about AMD's latest offerings for Q1 2016!

So That's Where Jim Keller Went To... Tesla Motors...

Subject: General Tech, Processors, Mobile | January 29, 2016 - 05:28 PM |
Tagged: tesla, tesla motors, amd, Jim Keller, apple

Jim Keller, a huge name in the semiconductor industry for his work at AMD and Apple, recently left AMD before the launch of the Zen architecture. This made us nervous, because when a big name leaves a company before a product launch, it could either be that their work is complete... or they're evacuating before a stink-bomb detonates and the whole room smells like rotten eggs.

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It turns out a third option is possible: Elon Musk offers you a job making autonomous vehicles. Jim Keller's job title at Tesla will be Vice President of Autopilot Hardware Engineering. I could see this position being enticing, to say the least, even if you are confident in your previous employer's upcoming product stack. It doesn't mean that AMD's Zen architecture will be either good or bad, but it nullifies the earlier predictions, when Jim Keller left AMD, at least until further notice.

We don't know who approached who, or when.

Another point of note: Tesla Motors currently uses NVIDIA Tegra SoCs in their cars, who are (obviously) competitors of Jim Keller's former employer, AMD. It sounds like Jim Keller is moving into a somewhat different role than he had at AMD and Apple, but it could be interesting if Tesla starts taking chip design in-house, to customize the chip to their specific needs, and take away responsibilities from NVIDIA.

The first time he was at AMD, he was the lead architecture of the Athlon 64 processor, and he co-authored x86-64. When he worked at Apple, he helped design the Apple A4 and A5 processors, which were the first two that Apple created in-house; the first three iPhone processors were Samsung SoCs.

Report: Intel Tigerlake Revealed; Company's Third 10nm CPU

Subject: Processors | January 24, 2016 - 12:19 PM |
Tagged: Tigerlake, rumor, report, processor, process node, Intel, Icelake, cpu, Cannonlake, 10 nm

A report from financial website The Motley Fool discusses Intel's plan to introduce three architectures at the 10 nm node, rather than the expected two. This comes after news that Kaby Lake will remain at the present 14 nm, interrupting Intel's 2-year manufacturing tech pace.

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(Image credit: wccftech)

"Management has told investors that they are pushing to try to get back to a two-year cadence post-10-nanometer (presumably they mean a two-year transition from 10-nanometer to 7-nanometer), however, from what I have just learned from a source familiar with Intel's plans, the company is working on three, not two, architectures for the 10-nanometer node."

Intel's first 10 nm processor architecture will be known as Cannonlake, with Icelake expected to follow about a year afterward. With Tigerlake expected to be the third architecture build on 10 nm, and not coming until "the second half of 2019", we probably won't see 7 nm from Intel until the second half of 2020 at the earliest.

It appears that the days of two-year, two product process node changes are numbered for Intel, as the report continues:

"If all goes well for the company, then 7-nanometer could be a two-product node, implying a transition to the 5-nanometer technology node by the second half of 2022. However, the source that I spoke to expressed significant doubts that Intel will be able to return to a two-years-per-technology cycle."

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(Image credit: The Motley Fool)

It will be interesting to see how players like TSMC, themselves "planning to start mass production of 7-nanometer in the first half of 2018", will fare moving forward as Intel's process development (apparently) slows.