AMD Releases 2014 Mobile APU Details: Beema and Mullins Cut TDPs

Subject: Processors | November 13, 2013 - 05:35 PM |
Tagged: Puma, Mullins, mobile, Jaguar, GCN, beema, apu13, APU, amd, 2014

AMD’s APU13 is all about APUs and their programming, but the hardware we have seen so far has been dominated by the upcoming Kaveri products for FM2+.  It seems that AMD has more up their sleeves for release this next year, and it has somewhat caught me off guard.  The Beema and Mullins based products are being announced today, but we do not have exact details on these products.  The codenames have been around for some time now, but interest has been minimal since they are evolutionary products based on Kabini and Temash APUs that have been available this year.  Little did I know that things would be far more interesting than that.

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The basis for Beema and Mullins is the Puma core.  This is a highly optimized revision of Jaguar, and in some ways can be considered a new design.  All of the basics in terms of execution units, caches, and memory controllers are the same.  What AMD has done is go through the design with a fine toothed comb and make it far more efficient per clock than what we have seen previously.  This is still a 28 nm part, but the extra attention and love lavished upon it by AMD has resulted in a much more efficient system architecture for the CPU and GPU portions.

The parts will be offered in two and four core configurations.  Beema will span from 10W to 25W configurations.  Mullins will go all the way down to “2W SDP”.  SDP essentially means that while the chip can be theoretically rated higher, it will rarely go above that 2W envelope in the vast majority of situations.  These chips are expected to be around 2X more efficient per clock than the previous Jaguar based products.  This means that at similar clock speeds, Beema and Mullins will pull far less power than that previous gen.  It should also allow some higher clockspeeds at the top end 25W area.

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These will be some of the first fanless quad cores that AMD will introduce for the tablet market.  Previously we have seen tablets utilize the cut down versions of Temash to hit power targets, but with this redesign it is entirely possible to utilize the fully enabled quad core Mullins.  AMD has not given us specific speeds for these products, but we can guess that they will be around what we see currently, but the chip will just have a lower TDP rating.

AMD is introducing their new security platform based on the ARM Trustzone.  Essentially a small ARM Cortex A5 is integrated in the design and handles the security aspects of this feature.  We were not briefed on how this achieves security, but the slide below gives some of the bullet points of the technology.

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Since the pure-play foundries will not have a workable 20 nm process for AMD to jump to in a timely manner, AMD had no other choice but to really optimize the Jaguar core to make it more competitive with products from Intel and the ARM partners.  At 28 nm the ARM ecosystem has a power advantage over AMD, while at 22 nm Intel offers similar performance to AMD but with greater power efficiency.

This is a necessary update for AMD as the competition has certainly not slowed down.  AMD is more constrained obviously by the lack of a next-generation process node available for 1H 2014, so a redesign of this magnitude was needed.  The performance per watt metric is very important here, as it promises longer battery life without giving up the performance people received from the previous Kabini/Temash family of APUs.  This design work could be carried over to the next generation of APUs using 20 nm and below, which hopefully will keep AMD competitive with the rest of the market.  Beema and Mullins are interesting looking products that will be shown off at CES 2014.

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Source: AMD

AMD Kaveri's Fast... But Less Than Expected.

Subject: General Tech, Processors | November 12, 2013 - 06:50 PM |
Tagged: Kaveri, apu13, amd

AMD will deliver its latest round of APUs (Kaveri) on January 14th. These processors, built on a 28nm process, will combine the Steamroller architecture on the CPU with HSA-compliant Graphics Core Next (GCN) cores on the GPU. Together they are expected to bring 856 GFLOPs of computational performance.

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Thomas Ryan at SemiAccurate, however, remembers that AMD expected over a TeraFLOP.

Of course Kaveri has been a troubled chip for AMD. At this point Kaveri is over a year late and most of that delay is due to a series of internal issues at AMD rather than technical problems. But now with the knowledge that Kaveri missed AMD’s internal performance targets by about 20 percent it’s hard to be very positive about AMD’s next big-core APU.

The problem comes from a reduction in the clock rate AMD expected back in February 2012. Steamroller was expected to reach 4 GHz but that has been slightly reduced to 3.7 GHz; this is obviously a small impact from a compute standpoint (weakened by just under10 GFLOPs). The GPU, on the other hand, was cut from 900MHz down to 720 MHz; its performance was reduced by a whole 25% (Update: 20%. Accidentally divided by 720 instead of 900). Using AMD's formula for calculating FLOP performance, Kaveri's 856 GFLOP rating corresponds to an 18% reduction from the original 1050 GFLOP target.

But, personally, I am still positive about Kaveri.

The introduction of HSA features into mainstream x86 processors has begun. The ability to share memory between the CPU and the GPU could be a big deal, especially for tasks such as AI and physics. AI especially interests me (although I am by no means an expert) because it is a mixture of branching and parallel instructions. The HSA model could, potentially, operate on the data with whichever architecture makes sense. Currently, synchronizing CPU and GPU memory is very costly; you could easily spend most of your processing time budget waiting for memory transfers.

856 GFLOPs is a definite reduction from 1050 GFLOPs. Still, if Kaveri (and APUs going forward) can effectively nullify the latencies involved with GPGPU work, an Intel Ivy Bridge-E Core i7 4960X has an instruction throughput of ~160 GFLOPs.

And before you say it: Yes, I know, Ivy Bridge-E can be paired with fast discrete graphics. This combination is ideal for easily separated tasks such as when the CPU prepares a frame and then a GPU draws it; you get the best of both worlds if both can keep working.

But what if your workload is a horrific mish-mash of back-and-forth serial and parallel? That is where AMD might have an edge.

Source: SemiAccurate

Video: Battlefield 4 Running on AMD A10 Kaveri APU and Image Decoder HSA Acceleration

Subject: Graphics Cards, Processors | November 12, 2013 - 06:10 PM |
Tagged: amd, Kaveri, APU, video, hsa

Yesterday at the AMD APU13 developer conference, the company showed off the upcoming Kaveri APU running Battlefield 4 completely on the integrated graphics.  I was able to push the AMD guys along and get a little more personal demo to share with our readers.  The Kaveri APU had some of its details revealed this week:

  • Quad-core Steamroller x86
  • 512 Stream Processor GPU
  • 856 GFLOPS of theoretical performance
  • 3.7 GHz CPU clock speed, 720 MHz GPU clock speed

AMD wanted to be sure we pointed out in this video that the estimate clock speeds for FLOP performance may not be what the demo system was run at (likely a bit lower).  Also, the version of Battlefield 4 here is the standard retail version and with further improvements from the driver team as the upcoming Mantle API implementation will likely introduce even more performance for the APU.

The game was running at 1920x1080 with MOSTLY medium quality settings (lighting set to low) but the results still looked damn impressive and the frame rates were silky and smooth.  Considering this is running on a desktop with integrated processor graphics, the game play experience is simply unmatched.  

Memory in the system was running at 2133 MHz.

The second demo looks at the image decoding acceleration that AMD is going to enable with Kaveri APUs upon release with a driver.  Essentially, as the demonstration shows in the video, AMD is overwriting the integrated Windows JPG decompression algorithm with a new one that utilizes HSA to accelerate on both the x86 and SIMD (GPU) portions of the silicon.  For the most strenuous demo that used 22 MP images saw a 100% increase in performance compared to the Kaveri CPU cores alone.

Author:
Subject: Processors
Manufacturer: AMD

More Details from Lisa Su

The executives at AMD like to break their own NDAs.  Then again, they are the ones typically setting these NDA dates, so it isn’t a big deal.  It is no secret that Kaveri has been in the pipeline for some time.  We knew a lot of the basic details of the product, but there were certainly things that were missing.  Lisu Su went up onstage and shared a few new details with us.

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Kaveri will be made up of 4 “Steamroller” cores, which are enhanced versions of the previous Bulldozer/Trinity/Vishera families of products.  Nearly everything in the processor is doubled.  It now has dual decode, more cache, larger TLBs, and a host of other smaller features that all add up to greater single thread performance and better multi-threaded handling and performance.   Integer performance will be improved, and the FPU/MMX/SSE unit now features 2 x 128 bit FMAC units which can “fuse” and support AVX 256.

However, there was no mention of the fabled 6 core Kaveri.  At this time, it is unlikely that particular product will be launched anytime soon. 

Click to read the entire article here!

ARM TechCon 2013: Altera To Produce ARMv8 Chips on Intel 14nm Fabs

Subject: Processors, Mobile | October 29, 2013 - 12:24 PM |
Tagged: techcon, Intel, arm techcon, arm, Altera, 14nm

In February of this year Intel and Altera announced that they would be partnering to build Altera FPGAs using the upcoming Intel 14nm tri-gate process technology.  The deal was important for the industry as it marked one of the first times Intel has shared its process technology with another processor company.  Seen as the company's most valuable asset, the decision to outsource work in the Intel fabrication facilities could have drastic ramifications for Intel's computing divisions and the industry as a whole.  This seems to back up the speculation that Intel is having a hard time keeping their Fabs at anywhere near 100% utilization with only in-house designs.

Today though, news is coming out that Altera is going to be included ARM-based processing cores, specifically those based on the ARMv8 64-bit architecture.  Starting in 2014 Altera's high-end Stratix 10 FPGA that uses four ARM Cortex-A53 cores will be produced by Intel fabs.

The deal may give Intel pause about its outsourcing strategy. To date the chip giant has experimented with offering its leading-edge fab processes as foundry services to a handful of chip designers, Altera being one of its largest planned customers to date.

Altera believes that by combing the ARMv8 A53 cores and Intel's 14nm tri-gate transistors they will be able to provide FPGA performance that is "two times the core performance" of current high-end 28nm options.

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While this news might upset some people internally at Intel's architecture divisions, the news couldn't be better for ARM.  Intel is universally recognized as being the process technology leader, generally a full process node ahead of the competition from TSMC and GlobalFoundries.  I already learned yesterday that many of ARM's partners are skipping the 20nm technology from non-Intel foundries and instead are looking towards the 14/16nm FinFET transitions coming in late 2014. 

ARM has been working with essentially every major foundry in the business EXCEPT Intel and many viewed Intel's chances of taking over the mobile/tablet/phone space as dependent on its process technology advantage.  But if Intel continues to open up its facilities to the highest bidders, even if those customers are building ARM-based designs, then it could drastically improve the outlook for ARM's many partners.

UPDATE (7:57pm): After further talks with various parties there are a few clarifications that I wanted to make sure were added to our story.  First, Altera's FPGAs are primarly focused on the markets of communication, industrial, military, etc.  They are not really used as application processors and thus are not going to directly compete with Intel's processors in the phone/tablet space.  It remains to be seen if Intel will open its foundries to a directly competing product but for now this announcement regarding the upcoming Stratix 10 FPGA on Intel's 14nm tri-gate is an interesting progression.

Source: EETimes
Author:
Manufacturer: ARM

ARM is Serious About Graphics

Ask most computer users from 10 years ago who ARM is, and very few would give the correct answer.  Some well informed people might mention “Intel” and “StrongARM” or “XScale”, but ARM remained a shadowy presence until we saw the rise of the Smartphone.  Since then, ARM has built up their brand, much to the chagrin of companies like Intel and AMD.  Partners such as Samsung, Apple, Qualcomm, MediaTek, Rockchip, and NVIDIA have all worked with ARM to produce chips based on the ARMv7 architecture, with Apple being the first to release the first ARMv8 (64 bit) SOCs.  The multitude of ARM architectures are likely the most shipped chips in the world, going from very basic processors to the very latest Apple A7 SOC.

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The ARMv7 and ARMv8 architectures are very power efficient, yet provide enough performance to handle the vast majority of tasks utilized on smartphones and tablets (as well as a handful of laptops).  With the growth of visual computing, ARM also dedicated itself towards designing competent graphics portions of their chips.  The Mali architecture is aimed at being an affordable option for those without access to their own graphics design groups (NVIDIA, Qualcomm), but competitive with others that are willing to license their IP out (Imagination Technologies).

ARM was in fact one of the first to license out the very latest graphics technology to partners in the form of the Mali-T600 series of products.  These modules were among the first to support OpenGL ES 3.0 (compatible with 2.0 and 1.1) and DirectX 11.  The T600 architecture is very comparable to Imagination Technologies’ Series 6 and the Qualcomm Adreno 300 series of products.  Currently NVIDIA does not have a unified mobile architecture in production that supports OpenGL ES 3.0/DX11, but they are adapting the Kepler architecture to mobile and will be licensing it to interested parties.  Qualcomm does not license out Adreno after buying that group from AMD (Adreno is an anagram of Radeon).

Click to read the entire article here!

Intel 2014 Desktop "Roadmap": Broadwell-K Late 2014?

Subject: General Tech, Processors | October 28, 2013 - 07:21 PM |
Tagged: Intel, Haswell-E, Broadwell-K, Broadwell

Ivy Bridge-E was confirmed for this holiday season and Haswell-E was proclaimed to follow in Holiday 2014 bringing good tidings of comfort and joy (and DDR4). Broadwell, the Haswell architecture transitioned to a 14nm process technology, was expected to be delayed until at least 2015 because it was not on any roadmap before that.

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Image credit: VR-Zone China

Until recently when something called "Broadwell-K" popped up slated for late Holiday 2014.

VR-Zone China, the site which broke this story (machine translated), cautiously assumes Broadwell-K signifies the platform will first arrive for the mainstream enthusiast. This would align with Intel's current "K" branding of unlocked processors and make sense to be introduced for the Consumer product segment without a Business offering.

If true, which seems likely, the question then becomes why. So let us speculate!

One possible (but almost definitely incorrect) reason is that Intel was able to get the overclocking challenges at 22nm solved and, thus, they want to build hype over what the enthusiasts can accomplish. Josh Walrath, our monitor of the fabrication industry's pulse at PC Perspective, did not bother entertaining the idea. His experiences suggest 14nm and 22nm are "not so different".

But, in the same discussion, Ryan wondered if Intel just could not get power low enough to release anything besides the upper mainstream parts. Rather than delay further, release the parts as they can fit in whatever TDP their market demands. Josh believes that is "as good [of a theory] as any". This also seems like a very reasonable possibility to me, too.

Two other theories: yields are sufficient for the "K" market (but nowhere else) or that Intel could be throwing a bone to the mid-range (lower than Haswell-E) enthusiast by letting them lead. It could also be almost any combination of the above or more.

Or, of course, Broadwell-K could refer to something completely arbitrary. At this point, no-one knows but anyone can guess.

So then, your turn? Comments await.

Source: VR-Zone

ARM TechCon 2013 Will Showcase the Internet of Things

Subject: Processors, Mobile, Shows and Expos | October 26, 2013 - 11:13 AM |
Tagged: techcon, iot, internet of things, arm

This year at the Santa Clara Convention Center ARM will host TechCon, a gathering of partners, customers, and engineers with the goal of collaboration and connection.  While I will attending as an outside observer to see what this collection of innovators is creating, there will be sessions and tracks for chip designers, system implementation engineers and software developers.

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Areas of interest will include consumer products, enterprise products and of course, the Internet of Things, the latest terminology for a completely connected infrastructure of devices.  ARM has designed tracks for interested parties in chip design, data security, mobile, networking, server, software and quite a few more. 

Of direct interest to PC Perspective and our readers will be the continued release of information about the Cortex-A12, the upcoming mainstream processor core from ARM that will address the smartphone and tablet markets.  We will also get some time with ARM engineers to talk about the coming migration of the market to 64-bit.  Because of the release of the Apple A7 SoC that integrated 64-bit and ARMv8 architecture earlier this year, it is definitely going to be the most extensively discussed topic. If you have specific questions you'd like us to bring to the folks at ARM, as well as its partners, please leave me a note in the comments below and I'll be sure it is addressed!

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I am also hearing some rumblings of a new ARM developed Mali graphics product that will increase efficiency and support newer graphics APIs as well. 

Even if you cannot attend the event in Santa Clara, you should definitely pay attention for the news and products that are announced and shown at ARM TechCon as they are going to be a critical part of the mobile ecosystem in the near, and distant, future.  As a first time attendee myself, I am incredibly excited about what we'll find and learn next week!

Imagination Technologies Unleashes Warrior MIPS P5600 CPU Core Aimed at Embedded and Mobile Devices

Subject: Editorial, General Tech, Networking, Processors, Mobile | October 19, 2013 - 01:45 AM |
Tagged: SoC, p5600, MIPS, imagination

Imagination Technologies, a company known for its PowerVR graphics IP, has unleashed its first Warrior P-series MIPS CPU core. The new MIPS core is called the P5600 and is a 32-bit core based on the MIPS Release 5 ISA (Instruction Set Architecture).

The P5600 CPU core can perform 128-bit SIMD computations, provide hardware accelerated virtualization, and access up to a 1TB of memory via virtual addressing. While the MIPS 5 ISA provides for 64-bit calculations, the P5600 core is 32-bit only and does not include the extra 64-bit portions of the ISA.

Imagination Technologies Warrior MIPS P5600 CPU Core.png

The MIPS P5600 core can scale up to 2GHz in clockspeed when used in chips built on TSMC's 28nm HPM manufacturing process (according to Imagination Technologies). Further, the Warrior P5600  core can be used in processors and SoCs. As many as six CPU cores can be combined and managed by a coherence manager and given access to up to 8MB of shared L2 cache. Imagination Technologies is aiming processors containing the P5600 cores at mobile devices, networking appliances (routers, hardware firewalls, switches, et al), and micro-servers.

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A configuration of multiple P5600 cores with L2 cache.

I first saw a story on the P5600 over at the Tech Report, and found it interesting that Imagination Technologies was developing a MIPS processor aimed at mobile devices. It does make sense to see a MIPS CPU from the company as it owns the MIPS intellectual property. Also, a CPU core is a logical step for a company with a large graphics IP and GPU portfolio. Developing its own MIPS CPU core would allow it to put together an SoC with its own CPU and GPU components. With that said, I found it interesting that the P5600 CPU core was being aimed at the mobile space, where ARM processors currently dominate. ARM is working to increase performance while Intel is working to bring its powerhouse x86 architecture to the ultra low power mobile space. Needless to say, it is a highly competitive market and Imagination Technologies new CPU core is sure to have a difficult time establishing itself in that space of consumer smartphone and tablet SoCs. Fortunately, mobile chips are not the only processors Imagination Technologies is aiming the P5600 at. It is also offering up the MIPS Series 5 compatible core for use in processors powering networking equipment and very low power servers and business appliances where the MIPS architecture is more commonplace.

In any event, I'm interested to see what else IT has in store for its MIPS IP and where the Warrior series goes from here!

More information on the MIPS 5600 core can be found here.

The little Atom that could

Subject: Processors | October 1, 2013 - 02:49 PM |
Tagged: Intel, atom, Bay Trail, Z3000, silvermont

Silvermont has a lot of work cut out for it to get out from the shadow of its poorly performing predecessors.  The new Z3000 is much more than just a low powered chip, it is Intel's first SoC aimed at taking market share from ARM.  It has been out for almost a month now and so it is worth rounding up a few of the reviews to remind you of Intel's plans in the low powered mobile market as well as the new modular server market.  The Tech Report benchmarked this chip running both Win8.1 and Android OSes against a variety of products powered by ARM, Snapdragon and Tegra as well as against a Core-i3 and an A4-5000 from AMD.  Check out the results in their full review.

If you missed it the first time around you can catch Ryan's coverage here.

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"Intel has just pulled back the curtain on the Atom Z3000 series, based on the "Bay Trail" SoC. Equipped with the potent new "Silvermont" CPU architecture, this chip is intended to challenge ARM for supremacy in tablets and convertibles. We have a first look at its architecture and performance."

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