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VIA Technology Forum 2005

Author: Ryan Shrout
Manufacturer: VIA
Tagged:

TSMC, VIA Chipsets and more AMD

TMSC's Dr. F.C. Tseng, Deputy CEO


Though Dr. Cheng couldn't make the VTF show this year, the deputy CEO was on hand to give us some insight into the market as far as transistor sizes are concerned. 




You can see from the graph above the expected migration time to 65nm of various areas of the industry.  As you would expect, the PC processor is always on the lead of technology transitions as such the 90nm blue ends first.  From that table you can see that the CPUs are going to start showing up in 65nm process technology by the end of this year, and this obviously fits with what we know of Intel's current processor roadmap. 


Dr. Tseng also discussed some of the current power usage problems at the 90nm level and what TSMC was doing to plan and address them.  The power dissipation of processors at the 90nm level is already becoming difficult to deal with, but at 65nm we are going to increase that density of the transistors even more, giving cooling engineers even more fits.  He said that lower power designs and new low power design techniques are required from the chip designers in order to get by the problem.  We'll know soon as Intel and AMD start their 65nm production how this is going.


VIA's Chewie Lin Talks Chipsets


Chewie Lin is in charge of high performance computing parts at VIA and has in previous years spelled out the future VIA chipsets for the Intel and AMD markets quite completely at VTF.  Though no new specific products were announced or discussed this year, we did get some insights and informational points from him.



First, Lin pledged that support for multi-GPU technology was going to be coming soon on future chipsets.  He didn't go any further into this than that, but from it we can guess this means two things: at least NVIDIA's SLI and ATI's CrossFire will be supported and that current chipsets like the K8T890 are not going to be able to support these technologies officially even with licensing agreements.  This is somewhat of a disappointment as PC Perspective has long been advocate of trying to get lower priced SLI setups in the hands of users not wanting to shell out for nForce4 SLI boards. 


Also in the talk of GPUs, Chewie mentioned that S3 will soon have a similar technology to the NVIDIA TurboCache and ATI HyperMemory.  This general technology gives the ability for a low cost GPU on the PCI Express bus to use the faster bus speeds to access main memory as a rendering buffer.  I don't think this will mean anything to the enthusiast community but may help VIA in the low end and OEM GPU markets.


So what other new technologies will we see on future chipset offerings from VIA?  Well you can expect to see chipsets with a full 24 and 32 lanes of PCI Express in the north bridge in coming months.  This is interesting to note as the rumors have been flying that NVIDIA may be planning a newer SLI chipset that has two full x16 lanes of PCIe for their graphics cards.  The downside of course is that this will raise the price of the chipset as the size and pin out count of the chipset increase as well as the number of layers on the board must also increase.  


PCI Express 2.0 will also be in full production by 2007.  The benefit of this new revision is of course higher speeds by a factor of two or so.  More importantly is the fact that this new PCIe is going to be backwards compatible with current PCI Express cards meaning much less of an upgrade headache when the new platforms are ready.  PCIe 2.0 also provides more power to the components and is more explicit in its standard and guidelines and that should lead to fewer development issues that we saw the first PCI Express have as its adoption grew. 


DDR2-800 will also be the speed grade that gets the switch from DDR1 off the industry's back.  AMD will have its new Socket M2 processors out with DDR2 memory controllers and the memory companies will also have long switched over from a dominantly DDR1 production to DDR2.  At 800 MHz, the DDR2 memory has a 6.4 GB/s bandwidth throughput and should have no problems exceeding the performance of even very low latency DDR1. 


There was more talk about the VIA 8251 south bridge this year too, a product that has been 'nearly out' for a year or so and has been the main crutch that has kept VIA from competing as well as they should in the chipset market.  Lin said it would finally be into production this month.  The main developments on the south bridge for the coming year included SATAII support as well as integrated RAID 5 and 10. 


Finally, VIA recognizes that the bandwidth between the north bridge and the south bridge is going to become more important as the features on the south bridge continue to increase with options of PCI Express lanes and faster storage.  VIA is planning on a new V-Link technology that sounds like it will be based around the HyperTransport technology: this would be more than capable of the bandwidth usage.  Also Lin hinted that single chip solutions might soon be the way for VIA to go as well. 


AMD's Charles Mitchell, Product Strategy Manager


Later in the week we heard from another representative from AMD on much of the same information that we already knew as well as the information that Dirk Meyer shared earlier.  There were two interesting points that he brought up that I thought were worthy of a final note here. 



First, he mentioned twice a dual core processor running at 2.0 GHz, which there currently isn't mentioned anywhere from AMD.  This probably means that AMD is going to do what it did with the first S939 processor releases, and just silently launch some slower speed and lower cache parts to the market.  My guess is that a 2.0 GHz dual core processor with either 1 MB or 512 KB of L2 cache each core is going to be called a 4000+.  Keep an eye out for this, as this may be the golden item we are all asking from AMD: lower priced dual core processors. 


The other point that Mitchell brought up was actually not a point he made directly.  Instead it has to do with the graphs of dual core performance that he presented for the Athlon 64 X2.  In comparing the four currently available X2 processors in the field of 'digital media performance' the AMD numbers should a strong value to moving up 200 MHz in frequency, but nearly no gains in moving to 1 MB of L2 cache from 512 KB. 


For example, the performance gains from the 4200+ (2.2 GHz, 512 KB L2) to the 4400+ (2.2 GHz, 1 MB L2) is only 0.8%.  On the same token, moving from a 4600+ (2.4 GHz, 512 KB L2) to the 4800+ (2.4 GHz, 1 MB L2) only shows a 1.0% increase in performance.  On the other hand, moving from a 4400+ (2.2 GHz, 1 MB L2) to a 4600+ (2.4 GHz, 512 KB L2) shows a very impressive 9.5% increase.  Now, all of these numbers are from AMD directly, so we can assume that there is no marketing 'smudge' on them. 


What's that tell you?  Get the fastest frequency Athlon 64 X2 you can afford, regardless of the L2 cache that is included.  I can see paying that additional money to upgrade to a 4600+, but the money involved in the move to a 4800+ seems way out of proportion, even by AMD's own accounts.


Final Thoughts


VIA has put on another very successful technology forum at the Grand Hyatt in Taipei this year.  Both the VIA representatives and VIA's partners put on a great discussion that gives all in attendance an important outlook into the future of the PC industry.  Now let's hope that the VIA chipset division can get on its toes again and release some competition to the currently available options! 


Be sure to use our price checking engine to find the best prices on the K8T890 chipset Abit AX8, and anything else you may want to buy!

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