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AMD's Bulldozer Architecture Preview: New from the Ground Up

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Subject: Processors
Manufacturer: AMD
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2011 Can't Get Here Fast Enough

    In the mid-90s AMD hired a bunch of ex-DEC/Alpha guys, and quickly got them working on a next generation architecture, which would become the basis for a decade+ of AMD processor designs.  The Athlon architecture’s basic structure, while expanded upon over the years, still can be seen in the latest Phenom II processors.  Improvements such as large L2 and L3 caches on chip, on-die memory controller, and the inclusion of 64 bit computing have all extended the basic Athlon architecture to where it is still an effective performer in the CPU market.  But all good things must come to an end and with the development of the very impressive Nehalem architecture from Intel, and the upcoming Sandy Bridge, AMD’s primary CPU architecture is certainly showing its age.


    The jump for AMD to Bulldozer is in fact much more reminiscent of the jump from the K6 to the K7.  Bulldozer is an entirely new architecture which borrows some of the more successful aspects of their current processors.  It does add several new innovations which should allow AMD to be far more competitive with its arch-rival Intel.  Let us dive into the basic presentation given to us by AMD to get a good taste of what Bulldozer will bring to the table.

Familiar but Divergent

    There are quite a few features that the Bulldozer core shares with the previous generation of parts.  The integrated northbridge, on-die memory controller, and large shared L3 cache are the major parts carried over from the Phenom II.  Though these are familiar components, AMD has changed these parts considerably.  AMD was fairly light on the details, but we will get word of more specifics as time passes and we get closer to release.

    For years Intel has been implementing SMT in some of their processors, and this technology has reached its peak with the Nehalem architecture.  Unlike the initial implementation in the Pentium 4, Nehalem seems to do SMT right.  The P4 would sometimes show a marked performance drop when SMT was enabled, depending on the workload.  Nehalem does not seem to share this problem with its much more robust implementation.  AMD never implemented a SMT solution; rather they were first with a true monolithic dual core with internal crossbars and a shared memory controller.  Intel released a dual core Pentium 4 before AMD’s Athlon X2, but these cores were connected via the FSB rather than internal crossbars and shared components.


    AMD continued to compete with more cores through the years, with the Phenom II X6 being the top desktop processor, and the Magny Cours 12 core part representing the server market.  Throwing more cores at a problem only works so well, and AMD knows this.  A lot of structures are replicated in a multi-core design, and when working with lightly threaded applications, a lot of these structures are underutilized to a great degree.  This seems to be the basis for the decision that AMD has made with their future products based on the Bulldozer core.


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