Review Index:

Next Gen Graphics and Process Migration: 20 nm and Beyond

Author: Josh Walrath
Subject: Editorial

20 nm and Below

Getting to 20 nm for these foundries is a challenge.  The first area is that of lithography.  The industry is not at the point where EUV (Extreme UV) is effective or affordable- or even workable for that matter.  To achieve the geometries required the foundries have to use immersion litho, multiple-patterning, and other optical techniques to effectively complete the litho stage.  This is not even delving into the materials needed.  Currently plans are that these will be bulk silicon wafers, but they will be using second generation HKMG, third generation SiGe strain technologies, and a gate-last approach.  The current 28 nm HKMG process from TSMC employs a less complex gate first approach that is more cost effective.  At 20 nm, there really is no choice but to force 3rd parties to adopt gate last to get the best results.

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Some two years ago GLOBALFOUNDRIES showed off their test 28 nm SRAM wafers.  Nobody expected them to be as delayed as they ended up being.

TSMC and others are busy developing their own technology akin to Tri-Gates.  These are called 3D Fin-FETs.  The basic design and physics behind these structures are essentially the same, but Intel trademarked theirs first.  The problem here is that we are still at least two years away from an effective implementation of FinFETs on any node from any pure-play foundry.  So the GPU guys are looking at a new process node that will effectively shrink the transistors, but may not have the electrical characteristics they were hoping for.  TSMC is not planning on opening up their 20 nm HKMG planar based lines until Q1/Q2 2014 with product being delivered in a Q3 timeframe.  TSMC is ahead of the bunch so far with actually implementing a 20 nm line.

GLOBALFOUNDRIES is also developing advanced process nodes, but so far things have been disappointing for the company.  When they first came on the scene some years back there was a lot of hope that they could move past TSMC in terms of implementing advanced process technologies since they had the impetus of being ahead in the days when AMD owned the fabs.  That impetus soon went away once the price of implementing these advanced technologies did not mesh with the economics of being a pure-play foundry.  While TSMC had opened their 28 nm HKMG nearly two years ago, it was less than a year ago that GF opened their 28 nm line to customers.  So far the designs from GF’s 28 nm have essentially been smaller SOCs from players like MediaTek and Rockchip.  AMD’s Kaveri APU has been delayed from what looks to be fabrication issues rather than design issues.  We do not expect to see Kaveri in mass quantities until Q1 2014.  GF has been behind the times when it comes to process technology, but some interesting things have come up that could change the landscape.


SOI Strikes Again

Who all thought that SOI was dead after AMD decided to stop using it after moving away from GF’s 32 nm PD-SOI process?  Well, more than a few, but the truth is SOI is a very handy technology that is used in many other products, one of which is high speed RF switching applications.  AMD has been utilizing PD-SOI for many generations of parts.  Partially-Depleted is an older and well understood substrate that has done very well for AMD.  Unfortunately for AMD, 32 nm was really the last gasp for PD-SOI.  Going below that size, the electrical characteristics of PD-SOI are not that much better than bulk silicon.  Though there is a positive difference, it is not enough to justify the 10% to 15% increase in wafer costs and slightly more complex manufacturing process. 

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The future site of FD-SOI integration?  Fab 8 is a sprawling complex that could be the new epicenter of advanced materials research utilzing SOI.

All is not lost for SOI.  FD-SOI (fully depleted) looks to be a very interesting and cost effective strategy for going below 28 nm.  FD-SOI does cost more per wafer, but most of the processing equipment is the same as for bulk silicon.  There does need to be special handling and usage of materials, but it is not nearly as complex as implementing FinFETs.  FD-SOI will utilize planar transistors, making manufacturing much more simple than that required for FinFETS.

The problem with FD-SOI manufacturing is that so far only one company has done it.  ST-Micro owns and operates a small Fab in France that can produce, at max, around 500 wafer starts per week.  Most of the mega-Fabs around the world can produce around 5000 to 12,000 wafer starts per week.  This Fab obviously cannot provide enough manufacturing space except for small clients with minimal needs.  ST-Micro has licensed out the technology to GLOBALFOUNDRIES, but the next issue is that so far it is aimed at only two nodes; 28 nm and the distant 14 nm.  We do not know if GF has plans for 20 nm, but looking at the global marketplace and the potential demand it seems that 20 nm FD-SOI would be a very good target to aim at.

FD-SOI seems like it answers most of the issues that crop up with the 22/20 nm node.  It does not require massive design rule changes, it can re-use a lot of bulk silicon manufacturing technology, and it runs perfectly fine with planar transistors at 22/20 nm.  In a gate-last configuration, FD-SOI with planar transistors actually looks like it outperforms and scales significantly better than Intel’s 22 nm Tri-Gate process.  A theoretical 20 nm FD-SOI process would have smaller features and be able to scale with clockspeed without as steep a power curve than what we see currently with Intel’s 22 nm Tri-Gate.  In terms of lower power operation, it appears as though FD-SOI is no better or worse than what Intel offers.

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The machinery is prepped and ready for GLOBALFOUNDRIES, but until we see how they do with mass production of Kaveri, we are unsure where they really sit.

Sounds perfect, right?  The problem is of course money and man-hours.  FD-SOI wafers are not being mass produced at this time, though production can be ramped up fairly quickly.  GF has yet to implement 28 nm FD-SOI at any of their fabs and the timeline for manufacturing products on this process has yet to be determined (or at least released to the general public).  Also, there is no public roadmap for a 20 nm FD-SOI process to be offered from anyone.

GF has only now started mass production of the latest generation of AMD APUs based on 28 nm.  The previous Kabini APUs were all produced by TSMC on their 28 nm process.  GF’s work on 20 nm has been confined to their test labs and very little is known about its characteristics.  Perhaps they are going for the jugular and are preparing a 20 nm FD-SOI, but so far their track record for hitting their process milestones has been lacking.  GF has increased their marketshare and are more competitive with TSMC, but so far they have not been able to compete adequately with what TSMC offers (plus their revenue is 1/5 that of TSMC).  Working with ST-Micro to implement 28 nm FD-SOI is a benefit for the company as there are customers who are interested in that particular node.  The performance and power results on ARM processors on 28 nm FD-SOI are outstanding, especially considering the relatively small cost increase to utilize FD-SOI wafers.

October 23, 2013 | 11:12 AM - Posted by Josh Walrath

Thanks!  I woke up this morning to weather that was -3C this AM!  Happy cold days to you as well!

October 23, 2013 | 11:31 AM - Posted by jgsieve (not verified)

Wow Josh, great article, I'm with you on this. you really have a passion for this.

October 23, 2013 | 01:14 PM - Posted by BigMack70 (not verified)

Great article!

I do think you got a bit speculative on the impact of mobile chips and on the supposed decline of the desktop graphics market... there has been some research recently showing that the desktop graphics segment is actually healthy and growing.

I think this needs substantiation and cannot be assumed:
"Remember, desktop graphics is actually a shrinking market due to the effective integration of graphics not just in the mobile space, but also with higher powered CPUs/APUs from Intel and AMD."

October 23, 2013 | 01:33 PM - Posted by Josh Walrath

Desktop graphics are not growing, they are shrinking.  But they are not shrinking that much.  Intel and AMD have such good integrated graphics anymore, a large portion of the people who would previously have been bundled with a low end card are now just integrated.

The sky is not falling on discrete graphics though, it just is not growing anymore.  Mobile IS growing, and that is where a lot of the R&D is going.

October 23, 2013 | 04:07 PM - Posted by BigMack70 (not verified)

I agree that a lot of R&D is going into mobile. However, things like this:

suggest that there is growth occuring in the discrete graphics segment.

That's why I said that there needs to be some substantiation of the idea that mobile + integrated GPUs are detrimental to discrete GPU growth.

October 23, 2013 | 04:10 PM - Posted by Josh Walrath

Discrete isn't growing though.  Take a look at some of the J Peddie numbers over the past few years.  Sure, gaming systems are not being affected by the PC slowdown, but there are fewer shipments now than there were 3 years ago for discrete graphics.  It isn't plummeting, and it is a healthy market, but it just isn't growing.  All of the growth is mobile right now.

October 23, 2013 | 03:21 PM - Posted by Roger Garcia (not verified)

HAHA I still have my voodoo 2's and sli cable!

October 23, 2013 | 06:27 PM - Posted by derz

The man is a repository of knowledge. Ryan is truly lucky.

October 23, 2013 | 06:29 PM - Posted by Josh Walrath

And I bathe regularly!

October 24, 2013 | 07:03 AM - Posted by JackRocky (not verified)

Wow cool article.

As for the innovations in GPUs on 20nm. Well there is HyperCube or Stacked GDDR5 memory. You will get a marginally better GPU die but because the bandwidth is going to sky rocket it will seem like Christmas again...

Also AMD had a stacked DRAM prototype spotted in the wild in 2011. Why didn't it hit the market earlier? Maybe it needs time to be introduced to the market or maybe they saved this architectural revelation for the tough times, that the 20 nm without FDSOI is going to be...

Also come to think about it, should a GPU have 1 TB/s of bandwidth to main memory with improved latency at the same time, a lot of the on-die caches could be removed and pave way for more computational resources in the same die area. Of course the engineers will have to do their job and pick the right choices, but this is a possible outcome of new architectural breakthroughs that are orthogonal to the silicon production process.

So my point is, that the 290X/Titan replacement may in fact be a massive performance leap forward irrespective of the 20nm problems.

October 24, 2013 | 08:08 AM - Posted by IanD (not verified)

All the "next-generation 14nm" nodes are very similar, they're basically "20nm" metal (64nm pitch double-patterned) with faster transistors -- this applies to Intel "14nm" TriGate, TSMC "16nm" FinFET, GF "14nm" FinFET, ST "14nm" FDSOI Samsung "14nm" FinFET, there probably isn't a single feature on any of the chips which is 14nm but they had to call them something which was better than 20nm.

TSMC wouldn't call theirs 14nm because "fourteen" sounds like "go towards death" in Chinese -- and STs 14nm FDSOI used to be called 20nm (which was at least honest) until their marketing realised that everyone else was calling their similar processes 14nm, so they renamed it...

They're all a big advance on standard "20nm" planar (with the same metal stack) because lower leakage and lower operating voltage means lower power.

The issues are the risk and production difficulties and cost with new transistor structures, especially FinFET where Intel certainly had (and have?) issues with process variability, in spite of the fast they can sell both fast/leaky chips and slow/low power ones for more money than typical ones.

For all these processes (and 20nm bulk planar) the cost per gate is similar to or even higher than 28nm HKMG, which removes one of the big drivers for going to the next process node for many products. The industry was expecting EUV to come along and save its bacon, this not only hasn't happened yet but will certainly miss the next node after these ("10nm") which will need triple patterning -- and good look with that, both for design and cost.

So the lower power and higher density will mean that more functionality can be crammed onto one chip, but also that this will cost more -- which is an alien concept to an industry that for the last 40 years has assumed that the next process node will deliver more band for the same buck. Consumers may be in for a nasty shock when they find that their next super iGadget is even more expensive...

October 24, 2013 | 09:45 AM - Posted by Josh Walrath

Thank goodness for marketing and superstition to drive process naming!  Thanks for the info.  So strange to see these "advanced" nodes with the 20 nm back end.  Gonna be an interesting next few years of process tech.  Now we wait and see if all that money the industry invested in EUV will ever come to fruition.

October 25, 2013 | 01:31 PM - Posted by snc (not verified)

came to this site first time, very impressive article, great read, thanks for that!! will stop by more often :)

October 25, 2013 | 05:15 PM - Posted by Alex Antonio (not verified)

" It looks to compete with the GTX TITAN, but it will not leapfrog that part. It will probably end up faster, but by a couple of percentage points. It will not be the big jump we have seen in the past such as going from a GTX 580 or HD 6970 to a GTX 680 or HD 7970."

Thats not really a fair comparison... you are comparing generational leaps compared to competing products.

The generational leap for the R290x is from the 7970. Similarly the GTX 780 is the generational leap from the GTX 680.

As for for how the R290x compares to the 7970.. it is about 59% faster give or take the application. Thats the biggest leap generation to generation for as long as I can remember.

October 26, 2013 | 01:26 PM - Posted by Josh Walrath

Well, those really aren't generational leaps.  They are bigger products based on the same GCN and Kepler architectures that were introduced with the HD 7970 and GTX 680 respectively.  Titan has been out around a year now, and only now does AMD have an answer for that.  All of them are based on 28 nm.  So, those big chips are nice jumps in performance, but they are not the big architectural leaps that we have seen from the GTX 580 to GTX 680 or the HD 6970 to the HD 7970.

October 26, 2013 | 07:50 PM - Posted by kukreknecmi (not verified)

Are theese mostly PR related or people just start assumptions from having a "%30 lower power consumption" on a "sram array" that, it will also be on the same level on 400mm2 GPU? Or both?

October 28, 2013 | 10:26 AM - Posted by Josh Walrath

Some is a bit of marketing hype, but the basics of timelines and products seems to be in line with what is expected.  Yes, there will be smaller chips, there will be more power efficient chips, but I think we will see some power/clock scaling issues with 20 nm planar.  It will be a better overall process than 28 nm HKMG, but do not expect miracles at the high end with large chips.  I could be out in left field, but it seems awfully positive and shiny in that blog.

October 27, 2013 | 03:48 PM - Posted by Watushio (not verified)

Great article Josh


October 29, 2013 | 09:47 AM - Posted by Josh Walrath


November 4, 2013 | 12:17 AM - Posted by MdX MaxX (not verified)

Wonderful article!

I wish everyone could read this so we would stop hearing all the "wahhh Intel/AMD/Nvidia doesn't care about enthusiasts anymore" nonsense. Transistors don't just get smaller on their own.

November 7, 2013 | 10:42 AM - Posted by Adele Hars (not verified)

You rock, Josh -- great piece. A few clarifications. IBM is still using PD-SOI at 22nm in Power8 (see They've got SOI-FinFET lined up for 14nm. The FD-SOI crowd is skipping directly from 28nm to 14nm, which they say will be ready next year before 14nm (bulk) FinFET (see (Tho 28nm FDSOI is already pretty awesome in terms of power & perf -- it's what got 3GHz & an extra day of smartphone battery life - see And ST's capacity in France is much more than you've indicated -- and now they're in the process of doubling it (thank you, Europe!) so they'll be at 4500 wafer starts/week by the end of 2014 (see Leti will have models available for 10nm FDSOI in a couple months, and PDKs in Q314 (see

November 8, 2013 | 08:56 AM - Posted by Josh Walrath

Really good info here!  Thanks for joining in!

January 10, 2014 | 03:18 AM - Posted by laurent (not verified)

Thank you for this comprehensive and complete article on technological limitations of SC industry vs graphics maturity. I work in the ST fab that develop 28 then 14nm FDSOI right now and this kind of article makes it worth the efforts (to not say the hard work!) we put in this technology.

January 30, 2014 | 01:52 PM - Posted by Josh Walrath

14 nm FDSOI looks very, very interesting.  Can't wait to see how it progresses!

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