Yesterday I pointed to a story that talked about Intel’s mobile 45nm Penryn processors being delayed and today it seems like the inevitable happened – talks of the desktop parts being late are surfacing. 

Digitimes is reporting that Core 2 Extreme QX9770 processor, the one we reviewed recently with the 1600 MHz FSB, is going from a January release to February or March.

Intel has pushed back the volume shipment date of its Core 2 Extreme QX9770 processors for the high-end desktop segment to February-March 2008 instead of January as reported previously, according to sources at Taiwan motherboard makers.

The quad-core 3.2GHz QX9770, which will be available at US$1,399 in thousand-unit quantities, is to replace the Core 2 Extreme QX9650 processor launched in November 2007, the sources noted.

However, Intel is yet to phase out the 3.0GHz QX9650 despite the planned launch of the QX9770, said the sources noting that the two quad-core CPUs will be available simultaneously, although the 1k-unit price for the QX9770 will be US$400 higher than that for the QX9650.

The TLB (translation lookaside buffer) bug found at AMD’s Phenom processors has weakened AMD’s ability to compete with Intel for the high-end desktop CPU market, a scenario that may lead to Intel to monopolize the segment, allowing the company to ask higher prices for its upcoming high-end processors, the sources contended.

The QX9770 will be Intel’s last high-end desktop CPU to support FSB technology before Intel’s first Nehalem-microarchitecture CPU, Bloomfield, based on QPI (quick path interconnect) technology is launched in the fourth quarter, the sources noted.

To the point of WHY we are not really sure.  A Dailytech post today might help explain some of it and describes an “errata” in some of the processors based on the 45nm Penryn design.  The rumored flaw affects the mean-time-failure of the CPUs but doesn’t affect Intel’s Xeon lineup or the previously launched QX9650 desktop processor. 
Intel engineers, speaking on background, detailed the problem. “Intel is very sensitive to mean time to failures.  During a simulation, at high clock frequencies, we noticed an increase of potential failures after a designated amount of time.”

He continues, “This is not acceptable for our customers that require longterm stability. It’s a showstopper.”

Previous reports of errata degrading the L2 and L3 cache performance were described as “false.” Microcode and BIOS updates issued by Intel since November do not fix or address the “showstopper” bug affecting the launch of the quad-core Q9300, Q9450 and Q9550 processors.