A look into AMD's future
Subject: General Tech | November 3, 2011 - 12:38 PM | Jeremy Hellstrom
Tagged: amd, vector computing, exascale, APU
Chuck Moore, CTO of AMD's Technology Group, gave a talk this week about AMD's plans for the future of their architecture. As you might conjecture the focus was on the further integration of the CPU and GPU, with an eye on power consumption. The hurdle he feels will be the tallest is the bandwidth for passing data back and forth between the two processors and he sees 3D stacks of memory sitting between the main system memory, the GPU and the CPU. Once developed he feels that the stacks of memory should be able to increase the amount of available communication bandwidth to the point where tasks can be handed smoothly back and forth between the two processors depending on which is more effective at certain tasks. Performance is not everything however, when The Register quotes Moore when he discusses the power requirements of a mid-range exascale class machine costing $200 million just to power and cool over a year, you begin to see the importance of bringing down power consumption and heat production.
"Because Advanced Micro Devices has not yet announced its 16-core "Interlagos" Opteron 6200 processors, it has to talk about something, and in situations like that, it is best to talk about the far-off future. And so AMD rounded up a bunch of its partners on Wednesday in San Francisco for a shindig to talk about the challenges of exascale computing."
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