These researchers are skipping the waterblock altogether and have made channels in surface of the die its self for de-ionized water to flow through and cool the chip. The 28-nanometer Altera FPGA they tested this cooling method on had numerous channels cut into it which were then sealed up with a layer of silicon. With a flow rate of 147 ml/minute they kept the chip to a comfortable 24C, a mere 4C higher than the temperature of the water and significantly lower than the 60C the chip would run at using air cooling. Neither Hack a Day nor PCPer encourage you to try to cut micron sized channels in your brand new processor, however we all hope to see this cooling technique incorporated into heatspreaders in future generations of processors.
"Researchers at Georgia Tech have been working on cutting fluid channels directly into the back of commercial silicon die (an Altera FPGA, to be exact). The tiny channels measure about 100 micron and are resealed with another layer of silicon. Water is pumped into the channels to cool the device efficiently."
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I wonder what back pressure
I wonder what back pressure that runs at. The flow rate is pretty high considering the likely very small total “area” of water flow. Original article doesn’t say much more in detail.
“incorporating silicon cylinders approximately 100 microns in diameter”
“water inlet temperature of approximately 20 degrees Celsius and an inlet flow rate of 147 milliliters per minute, the liquid-cooled FPGA operated at a temperature of less than 24 degrees Celsius, compared to an air-cooled device that operated at 60 degrees Celsius”
The #1 reason why this make
The #1 reason why this make sense to research is for 3D chip stack applications.
You have vertical TSV for data transport and horizontal microchannel for fluid/heat transport.
Ultimately we should be able to fab fully ‘3d’ chips.
600mm2 hold 8 billion transistors.
If we can have a layer in 500 micron (for a 600x600x1200 chip), thats about 20 trillion transistors, at maybe 600mhz with micro channel cooling. (at 28nm… intel 10nm could double that density)
The idea of having a dice sized cube that hold 20 trillion high performance transistors, and having board with hundreds upon hundreds of them (by using stacked memory) might only be a decade or two away…
Very cool. I love this stuff.
Very cool. I love this stuff. Computer tech just charges ahead.
Every so often we hear about
Every so often we hear about some new, very cool cooling tech, and I always get all excited about it. Then two years go by and all we have is more of the same, though bigger and a bit more refined. I really want this to happen. I can’t help but feel excited. I will never learn.
Hey, it works for engines…
Hey, it works for engines…
And
And computers!
https://youtu.be/yAZRPXWy_nM