SemiAccurate had a chance to talk with Terrance Shih, the current project lead on VIA’s USB 3.0 team.  They discuss the hurdles that USB 3.0 presents, which were not so much in the development of xHCI but in making the new interface compatible with EHCI and OHCI/UHCI that handle legacy USB 2.0/1.1 devices, something alluded to on PCPer Podcast #133.  They cover a wide range of development choices, such as why they are implementing the controller to utilize only a single PCI3 lane and why VIA believes the first LightPeak demos we saw were using hybrid USB 3.0 and LightPeak to function.

“Pushing the speed limit always brings new challenges and USB 3.0 was no different. As speeds increase, design tolerances and signal integrity margins become tighter and higher-order parasitic effects that were safely disregarded become very significant. One of the biggest challenges in USB 3.0 in general is actually the physical layer, which is the lowest and most fundamental part of a network or bus. The physical layer comprises of the connectors, cables, and the actual technologies involved in sending and receiving raw data bits. This part is so challenging that some companies actually outsource this part of the design. We’re quite proud to say that we built every critical piece of our Host Controller, from the physical layer up to the drivers.”

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