So much for Intel's Tri-gate

Subject: General Tech | March 16, 2012 - 12:16 PM | Jeremy Hellstrom
Tagged: tri-gate, FinFET, silicon nanowires

We've just met Intel's Tri-Gate transistor technology, which offers significant improvements in power efficiency as well as reducing waste hear but researchers have already moved onto the next new technology.  Referred to as silicon nanowire transistors in this story at The Register, the next generation of transistor may have no gates whatsoever, or be made entirely of gates, depending on how you look at it.  The wire will be wrapped in a silicon oxide, high-K metal gate making the transistor cylindrical and not limited in the number of gates possible in the same way that planar or 3D transistors are.  The development of this technology is in its infancy but could well help us see chips go below 5nm as it matures.

"The next step in transistor architecture will likely be silicon nanowires – extremely thin silicon wires that will form the transistor's chanel, surrounded on all sides by a wrap-around silicon oxide, high-K metal gate.

"It's the ultimate fully-depleted device," the director of IBM's Semiconductor Research & Development Center, Gary Patton, said during his keynote address at Wednesday's Common Platform Technology Forum 2012 in Santa Clara, California. "You don't have a gate on just two sides, or three sides – it's fully encapsulating the silicon nanowire device."

Here is some more Tech News from around the web:

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Intel won't be the only one with 3D transistors for long

Subject: General Tech | December 8, 2011 - 12:24 PM | Jeremy Hellstrom
Tagged: fujitsu, suvolta, Intel, transistor, tri-gate, ddc, deeply depleted channel

Fujitsu and SuVolta, a designer of custom CMOS chips, have announced the fruits of a recent joint project aimed at developing a 3-dimensional transistor to match Intel's FinFET.  As we have seen with Ivy Bridge, this advancement in transistor technology significantly reduces the power needs of a chip which utilizes them.  The current prototypes utilize a 65nm process but the companies claim it will easily scale to 32nm.  SemiAccurate also reports that the Deeply Depleted Channel shows an advantage over Intel's Tri-gate transistor design  as DDC is capable of handling variable threshold voltages; Intel's requires that all threshold voltages match.  It will be a while before we see these implemented at Fabs but it is nice to see competition in the next generation of transistor technology.

"During the IEDM conference in Los Altos earlier today Fujitsu presented a paper jointly authored by SuVolta. The paper describes how a newly developed transistor with a deeply depleted channel can achieve the same power savings as those announced by Intel that has launched a FinFET-transistor, which the company calls a 3D transistor."

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• OpenDNS Releases DNS Encryption Tool @ Slashdot
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Ivy Bridge should be here by the spring

Subject: Processors | December 5, 2011 - 01:48 PM | Jeremy Hellstrom
Tagged: Ivy Bridge, Intel, i3-3200, i7-3700, i5-3500, i5-3400, 22nm, tri-gate

Good news for those of you who have been waiting to upgrade in the hopes that Ivy Bridge will be arriving on time.  It seems your patience has paid off but you will have to wait a while longer before you can get your hands on Intel's next tick.  You can look forward to more PCIe 3.0 lanes, just like those who've jumped onto the new Sandy Bridge E chips and a bump on the GPU portion of the chip.  X-bit Labs doesn't have any pricing for the new chips, but they do list all of the models you will be able to buy.  One thing you should note are the impressive TDPs, they may not count as low power CPUs but they're certainly lower than other Intel and AMD chips currently on the market.

"Intel Corp. has notified its partners about its decision to introduce of its next-generation code-named Ivy Bridge processors in the second quarter of 2012. Previously the company planned to release the Core i 3000-series central processing units (CPUs) for desktops in March - April timeframe, which left a possibility to unveil the chips in the first quarter."

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Processors

• Intel Core i7-3690X-EE @ LostCircuits
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• AMD FX-8150 CPU @ Metku.net
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Take a trip on the Ivy Bridge

Subject: Processors | September 22, 2011 - 02:35 PM | Jeremy Hellstrom
Tagged: Intel, Ivy Bridge, tick, 22nm, tri-gate

Over at AnandTech you can read about the first processor to be designed using Intel's new Tri-Gate transistors, Ivy Bridge.  As well this new take on Sandy Bridge will natively support USB 3.0 thanks to the improved Z77, Z75 and H77 chipsets.  There will also be Q77, Q75 and B75 to make sure you get a more alphabet soup to deal with.  The new GPU inside is something Intel is rather proud of, a claimed 33% improvement is impressive and signals that Intel really is taking the iGPU portion of their chips seriously.  That focus is confirmed if you read through the minimal improvements to the CPU side, not a bad thing at all, simply confirmation that Intel is concerned more with power efficiency and graphics performance instead of just pumping up the megahertz.

"Five years ago Intel announced its ambitious tick-tock release cadence. We were doubtful that Intel could pull off such an aggressive schedule but with the exception of missing a few months here or there tick-tock has been a success. On years marked by a tick Intel introduces a new manufacturing process, while tock years keep manufacturing process the same and introduce a new microprocessor architecture. To date we've had three tocks (Conroe, Nehalem, Sandy Bridge) and two ticks (Penryn, Westmere). Sampling by the end of this year and shipping in the first half of next year will be Intel's third tick: Ivy Bridge."

Here are some more Processor articles from around the web:

Processors

• Intel Core i5 2400S @ Phoronix
• All Core i7 Models @ Hardware Secrets
• All Core i5 Models @ Hardware Secrets
• All Core i3 Models @ Hardware Secrets
• Mobile CPU Comparison Guide @ TechARP
• Workstation & Server CPU Comparison Guide @ TechARP
• Interactive AMD Phenom product ID guide @ OC Inside

IDF 2011: Intel Haswell Architecture Offers 20x Lower Standby Power

Subject: General Tech, Processors | September 13, 2011 - 01:05 PM | Ryan Shrout
Tagged: tri-gate, sandy bridge, Ivy Bridge, idf 2011, idf, haswell

The first keynote of the Intel Developer Forum is complete and it started with Paul Otellini discussing the high level direction for Intel in the future.  One of the more interesting points made was not about Ivy Bridge, which we will all see very soon, but about Haswell, Intel's next microarchitecture meant to replace the Sandy Bridge designs sometime in late 2012 or early 2013.  Expected to focus on having 8 processing cores, much improved graphics and the new AVX2 extenstion set, Haswell will also be built on the 3D tri-gate transistors announced over the summer.

Otellini describes Haswell's performance in two important metrics.  First, it will use 30% less power than Sandy Bridge at the same performance levels.  This is a significant step and could be the result of higher IPC as well as better efficiency thanks to the 22nm process technology.  

Where Haswell really excels is apparently in the standby metric: as a platform it could use as much as 20x less power than current hardware.  Obviously Intel's engineers have put a focus on power consumption more than performance and the results are beginning to show.  The goals are simple but seemingly impossible to realize: REAL all-day power and more than 10 days of stand by time.