Of Near Threshold Voltage and Atomic Transistors

Subject: General Tech | February 20, 2012 - 01:53 PM |
Tagged: NTV, near threshold voltage, transistor, pentium, qubit

The eyes of the world are on the 22nm Ivy Bridge chip that Intel has slowly been giving us details of but there is also something interesting happening at 32nm with the world's most repurposed Intel CPU.  Once again the old Pentium core has been dusted off and modified to showcase new Intel technology, in this case Near Threshold Voltage operations.  In this case the Threshold refers to the amount of power needed to flip a bit on a processor, what you would be used to seeing as VCC and is the reason those dang chips get so toasty.   Much in the way that SpeedStep and other energy savings technologies reduce the operating frequency of an underloaded processor, Intel has tied the amount of voltage to the frequency and lowers the power requirements along with the chips speed.  The demonstration model that they showed The Register varied from a high end of 1.2 volts at 915MHz to a mere 280 millivolts at 3MHz and down to 2 millivolts in sleep.  By scaling the power consumption Intel may have found a nice middle group between performance and TDP to keep ARM from making major inroads into the server room, if they can pull it off with more modern processors.   They also showed off a solar powered CPU which might be handy on a cell phone but seems of limited commercial value in the short term as well as a

Keeping with the theme of small, The Register also has news of research which has created a working transistor out of a single phosphorus atom, an atomic radius of 0.110nm for those who like some scale with their transistors.  The trick was the temperature; seeing as it is a measure of energy expressed as movement (to put it ridiculously simply) you need low temperatures to keep the atoms from moving more than 10nm.  At -196°C the atom was stable enough for its position to be accurately predicted which is absolutely necessary if you plan to use the atom as a qubit.  Overclocking is going to be difficult.

intel_isscc_ntv_concept.jpg

"The threshold voltage is the point at which transistors turn on and conduct electricity. If you can flip bits near this threshold, instead of using much larger swing that is typically many times this threshold voltage to turn zeros into ones and vice versa, then you can save a lot of power."

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Source: The Register

Intel won't be the only one with 3D transistors for long

Subject: General Tech | December 8, 2011 - 12:24 PM |
Tagged: fujitsu, suvolta, Intel, transistor, tri-gate, ddc, deeply depleted channel

Fujitsu and SuVolta, a designer of custom CMOS chips, have announced the fruits of a recent joint project aimed at developing a 3-dimensional transistor to match Intel's FinFET.  As we have seen with Ivy Bridge, this advancement in transistor technology significantly reduces the power needs of a chip which utilizes them.  The current prototypes utilize a 65nm process but the companies claim it will easily scale to 32nm.  SemiAccurate also reports that the Deeply Depleted Channel shows an advantage over Intel's Tri-gate transistor design  as DDC is capable of handling variable threshold voltages; Intel's requires that all threshold voltages match.  It will be a while before we see these implemented at Fabs but it is nice to see competition in the next generation of transistor technology.

SA_SuVolta-transistor.jpg

"During the IEDM conference in Los Altos earlier today Fujitsu presented a paper jointly authored by SuVolta. The paper describes how a newly developed transistor with a deeply depleted channel can achieve the same power savings as those announced by Intel that has launched a FinFET-transistor, which the company calls a 3D transistor."

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Source: SemiAccurate

Intel steps out of line to show off 3D transistors

Subject: General Tech | August 19, 2011 - 11:40 AM |
Tagged: Intel, transistor, tri-gate, Ivy Bridge

Back in May Intel released an interesting video showing off Tri-Gate technology, which brings a third dimension to transistors.  That will allow transitions to happen with much less voltage, reducing power requirements and heat generation and allowing for increases in transistor density.  Ivy Bridge was suggested as the likely suspect for Intel to first utilize Tri-Gates and over at SemiAccurate you can see the proof as well as the process.  Intel is claiming a 37% performance increase at low voltages or about half the power usage if you keep the same performance.  Read on to see the difference between FINFets that will be in the competitions chips and the Intel-only three dimensional transistors.

Planar_vs_Tri-Gate.jpg

"Intel is set to become the first company to mass produce non-planar transistors with their upcoming 22nm process. Others are talking about FD-SOI, FINFets, and several related structures, but only Intel is set to produce anything in the near future.

There has been a lot of talk about what Intel is doing, and a lot of incomplete or incorrect information put forward from many different sources. What Intel is making is called Tri-Gate transistors, something that is a radical departure from planar ’2D’ transistors, and distinct from FINFets in a very important way."

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Source: SemiAccurate

Intel Invents New 3 Dimensional Transistor for 22nm Ivy Bridge CPUs, Dubs it "Tri-Gate"

Subject: General Tech, Processors | May 4, 2011 - 01:55 PM |
Tagged: transistor, Intel

"After a decade of research, Intel has unveiled the world's first three dimensional transistor" states Mark Bohr, a Senior Fellow for Intel. Silicon based transistors in computers, mobile devices, vehicles, and embedded equipment have only existed in a planar, or two dimensional, form until today.

The new three dimensional transistor, dubbed "Tri-Gate," is now ready for high volume production, and will be included in Intel's new Ivy Bridge 22nm processors. This new Tri-Gate transistor is a huge deal for Intel as it will enable them to maintain the pace of current chip evolution as outlined by Moore's Law. If you are not familiar with Moore's Law, it states that approximately every 18 months, transistor density will double, bringing with it increases in performance and yeild while decreasing cost of production. Intel states that "It has become the basic business model for the semiconductor industry for more than 40 years." 

As processors become smaller and smaller, the electric current becomes more and more difficult to contain.  There are hundreds of thousands of minute connections and switches inside today's processors, and as manufacturing processes shrink, the amount of current leakage increases.  With Intel's Core 2 Duo processors, Intel created a new "high-k"(high dielectric constant, which is a property of matter relating to the amount of charge it can hold) metal gate transistor using a material called Hafnium.  The new material replaced the silicon dioxide dielectric gate of the transistor to combat the current leakage problem at 32nm.  This allowed the chip process to shrink while scaling to produce less current leakage and heat.  To be more specific, Intel states that "because high-k gate dielectrics can be several times thicker, they reduce gate leakage by over 100 times. As a result, these devices run cooler."

Unfortunately, at the much smaller 22nm process, Intel was not achieving results congruent with Moore's Law using even their high-k gate transistors.  In order to maintain the scaling predicted in Moore's Law, Intel had to once again re-invent their transistors.  In order to create a smaller manufacturing process while overcoming current leakage, Intel had to develop a way to use more of what little space they had available to them.  It is here that they entered the third dimension.  By designing a transistor that is able to control the electrical current on three sides instead of a single plane, they are able to shrink the transistor while ending up with more surface area to "control the stream" as Mark Bohr puts it.

Planar_vs_Tri-Gate.jpg

The proposed benefits of Tri-Gate lie in it's ability to operate at lower voltages, with higher energy efficiency, all while running cooler and faster than ever before.  More specifically, up to 37 percent increases in performance at low voltages versus Intel's current line of 32nm processors.  Intel further states that "the new transistors consume less than half the power when at the same performance as 2-D planar transistors on 32nm chips."  This means that at the same performance level of the current crop of Intel CPUs, Ivy Bridge will be able to do the same calculations either while using half the power needed of Sandy Bridge or nearly twice as fast (it is unlikely to scale perfectly as there is overhead and other elements of the chip that will not be as radically revamped) at the same level of power consumption.  If this sort of scaling turns out to be true for the majority of Ivy Bridge chips, the overclocking abilities and resulting performance should be of unprecedented levels.

The use of Tri-Gate transistors is also mentioned as being beneficial for mobile and handheld devices as the power efficiency should allow increases in battery life.  This is due to the chip running at decreased voltages while maintaining (at least) the same level of performance as current mobile chips.  While Intel did not demo any mobile CPUs, they did state that Tri-Gate transistors may be integrated into future Atom chips.

Source: Intel