TSMC's ultraviolet lithography was a little too extreme

Subject: General Tech | February 27, 2014 - 08:37 AM |
Tagged: euv, photolithography, Intel, TSMC, DSA

A recent test at TSMC proved their experimental extreme UV lithography process is a little too extreme after a misaligned laser caused serious internal damage to their prototype.  This is rather sad news for TSMC as EUV has been touted as the best way to reduce the chip making process below 10nm.  Intel has been hedging their bets about EUV, they have invested heavily in the development of the technology but recently have teamed up with ASML Holdings and Arkema to work on directed self assembly, where the chips are convinced to form out of solution on a molecular basis.  We are not quite talking Von Neumann machines but it is certainly within the same realm of thought.  Other researchers are working on electron etching; forsaking light and its comparatively large wavelength for much smaller etching tools.  You can read more about how companies such as Intel are trying to keep Moore's law alive at The Register.

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"A recent test of the next-generation chip-etching technology known as extreme ultraviolet lithography (EUV) has come a cropper at chip-baking giant Taiwan Semiconductor Manufacturing Company (TSMC)."

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Source: The Register

Take that Moore! Electron beam etching set to take us to the 10nm process

Subject: General Tech | February 15, 2012 - 10:45 AM |
Tagged: photolithography, moores law, MAPPER, etching, electron lithography

Josh has covered the lithography process in depth in several of his processor reviews, watching the shrink from triple digit process to double digit process as the manufacturers refine existing processes and invent new ways of etching smaller transitors and circuits.  We've also mentioned Moore's Law several times, which was a written observation by Gordon E. Moore that has proven to be accurate far beyond his initial 10 year estimate for the continuation of the trend that saw that "the number of components in integrated circuits had doubled every year from the invention of the integrated circuit in 1958 until 1965".  It is a measure of density, not processing power as many intarweb denizens interpret it.

With UV light currently being the solution that most companies currently implement and expect to use for the near future, the single digit process seems out of reach as the bandwidth of UV light can only be compressed so small without very expensive work arounds being implemented.  That is why the news from MAPPER Lithography of Delft, The Netherlands is so exciting.  They've found a way to utilize directed electron beams to etch circuitry and are testing out 14nm and 10nm processes and doing it to the standards expected by industry.  This may be the process used to take us below 9nm and extend the doubling of tranisitor density for a few years to come.  Check out more about the process at The Register and check out the video below.

"An international consortium of chip boffins has demonstrated a maskless wafer-baking technology that they say "meets the industry requirement" for next-generation 14- and 10-nanometer process nodes.

Current chip-manufacturing lithography uses masks to guide light onto chip wafers in order to etch a chip's features. However, as process sizes dip down to 20nm and below, doubling up on masks begins to become necessary – an expensive proposition."

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Source: The Register