Come on AMD, spill the beans on Steamroller already

Subject: General Tech | September 6, 2012 - 02:58 PM |
Tagged: vishera, trinity, Steamroller, piledriver, hot chips, bulldozer, amd, Abu Dhabi

You've seen the slides everywhere and read through what Josh could observe and predict from those slides but at the end of Hot Chips will still know little more about the core everyone is waiting for.  The slides show a core little changed from Bulldozer, which is exactly what we've been expecting as AMD has always described Steamroller as a refined Bulldozer design, improving the existing architecture as opposed to a complete redesign.  SemiAccurate did pull out one little gem which might mean good news for both AMD and consumers which pertains to the high density libraries slide.  The 30% decrease in size and power consumption seems to have been implemented by simply using the high density libraries that AMD uses for GPUs.  As this library already exists, AMD didn't need to spend money to develop it, they essentially managed this 30% improvement with a button press, as SemiAccurate put it.  This could well mean that Steamroller will either come out at a comparatively low price or will give AMD higher profit margins ... or a mix of both.

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"With that in mind, the HDL slide was rather interesting. AMD is claiming that if you rebuild Bulldozer with an HDL library, the resulting chip has a 30% decrease in size and power use. To AMD at least, this is worth a full shrink, but we only buy that claim if it is 30% smaller and 30% less power hungry, not 30% in aggregate. That said, it is a massive gain with just a button press.

AMD should be applauded, or it would have been, but during the keynote, the one thing that kept going through my mind was, “Why didn’t they do this 5 years ago?”. If you can get 30% from changing out a library to the ones you build your GPUs with, didn’t someone test this out before you decided on layout tools?"

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Source: SemiAccurate

Fee PHI fo fum; Intel changes the smell of a Pentium

Subject: General Tech | September 5, 2012 - 03:49 PM |
Tagged: Xeon Phi, xeon, larrabee, knights corner, Intel, hot chips

The Register is back with more information from Hot Chips about Intel's Xeon Phi coprocessor, which seems to be much more than just a GPU in drag.  Inside the shell you will find at least 50 cores and at least 8GB of GDDR5 graphics, wwith the cores being very heavily modified 22-nanometer Tri-Gate process Pentium P54C chips clocked somewhere between 1.2-1.6GHz.  There is a brand new Vector Processing Unit which processes 512-bit SIMD instructions and sports an Extended Math Unit to handle calculations with hardware not software.  Read on for more details about the high-speed ring interconnects that allow these chips to communicate among themselves and with the Xeon server it will be a part of.

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"Intel has been showing off the performance of the "Knights Corner" x86-based coprocessor for so long that it's easy to forget that it is not yet a product you can actually buy. Back in June, Knights Corner was branded as the "Xeon Phi", making it clear that Phi was a Xeon coprocessor even if it does not bear a lot of resemblance to the Xeon processors at the heart of the vast majority of the world's servers."

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Source: The Register

A lot of little Phi coprocessors lightens the load

Subject: General Tech | August 31, 2012 - 02:43 PM |
Tagged: Intel, xeon, Xeon Phi, hot chips, larrabee

The Xeon Phi is not Larrabee but it does give a chance to remind people that Intel did at one time swear we would be seeing huge results from a lot of strung together Pentium chips.  Nor is Many Integrated Cores the same as AMD's Magny-cours, although you can be forgiven if that thought popped into your head.  Instead the Xeon Phi is a co-processor that will have 50 or more 512-bit SIMD architecture based processors, each with 512KB of Level 2 cache.  These cores are comparatively slow on their own but have been designed to spread tasks over dozens of cores for parallel processing to make up for the lack of individual power.  Intel sees Phi as a way to create HPC servers which will be physically smaller than one based solely on traditional Xeon based servers as well as being more efficient.  There is still a lot more we need to learn about these chips; until then you can check out The Inquirer's article on Intel's answer to NVIDIA and AMD's HPC cards.

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"CHIPMAKER Intel revealed some architectural details of its upcoming Xeon Phi accelerator at the Hotchips conference, saying that the chip will feature 512-bit SIMD units."

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Source: The Inquirer
Author:
Subject: Processors
Manufacturer: AMD

HotChips 2012

 

Ah, the end of August.  School is about to start.  American college football is about to get underway.  Hot Chips is now in full swing.  I guess the end of August caters to all sorts of people.  For the people who are most interested in Hot Chips, the amount of information on next generation CPU architectures is something to really look forward to.  AMD is taking this opportunity to give us a few tantalizing bits of information about their next generation Steamroller core which will be introduced with the codenamed “Kaveri” APU due out in 2013.

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AMD is seemingly on the brink of releasing the latest architectural update with Vishera.  This is a Piledriver+ based CPU that will find its way into AM3+ sockets.  On the server side it is expected that the Abu Dhabi processors will also be released in a late September timeframe.  Trinity was the first example of a Piledriver based product, and it showed markedly improved thermals as compared to previous Bulldozer based products, and featured a nice little bump in IPC in both single and multi-threaded applications.  Vishera and Abu Dhabi look to be Piledriver+, which essentially means that there are a few more tweaks in the design that *should* allow it to go faster per clock than Trinity.  There have been a few performance leaks so far, but nothing that has been concrete (or has shown final production-ready silicon).

Until that time when Vishera and its ilk are released, AMD is teasing us with some Steamroller information.  This presentation is featured at Hotchips today (August 28).  It is a very general overview of improvements, but very few details about how AMD is achieving increased performance with this next gen architecture are given.  So with that, I will dive into what information we have.

Click to read the entire article here.

Hot Chips is coming and IBM has already spilled its beans

Subject: General Tech | August 21, 2012 - 03:27 PM |
Tagged: IBM, power7+, Intel, amd, hot chips

While it doesn't get the news coverage that Intel and AMD's chips do, IBM's Power series has been with us for a while and they seem really excited about the new Power7+ chip that they are about to drop.  They are so excited that they didn't even wait for the Hot Chips conference where many manufacturers will be revealing their new silicon.  For instance, the new chip will carry 32MB of L3 cache, AES and SHA-2 acceleration and models running from a modest 4 cores at 3GHz, a 4GHz 8 core model and a possible 4 core model topping 5GHz if The Register got their maths right.  Check it all out here; with more likely to come at Hot Chips next week.

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"The Hot Chips 24 conference hosted by Stanford University is next week, and IBM, Oracle, Advanced Micro Devices, Fujitsu, and Intel are expected to talk tech relating to just-announced or impending processors. But Big Blue seems unable to contain its enthusiasm for the Power7+ chip that it will talk about alongside its next-generation zNext processors for its System z mainframes."

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Source: The Register