AMD Demonstrates ARM-Based NFV Solution Using Hierofalcon SoC

Subject: General Tech, Networking | October 11, 2014 - 01:42 AM |
Tagged: sdn, nfv, networking, Hierofalcon, arm, amd

AMD, in cooperation with Aricent and Mentor Graphics, recently demonstrated the first ARM-based Network Functions Virtualization (NFV) solution at ARM TechCon. The demonstration employed AMD's Embedded R-Series "Hierofalcon" SoC virtualizing a Mobile Packet Core running subscriber calls. The 64-bit ARM chip is now sampling to customers and will be generally available in the first half of next year (1H 2015). The AMD NFV Reference Solution is aimed at telecoms for use in communications network backbones where AMD believes an ARM solution will offer reduced costs (both initial and operational) and increased network bandwidth.

AMD ARM-Based Hierofalcon 64-bit SOC.jpg

The NFV demonstration of the Mobile Packet Core entailed virtualizing a Packet Data Network Gateway, Serving Gateway, Mobility Management Entity, and virtualized Wireless Evolved Packet Core (vEPC) applications. AMD further demonstrated live traffic migration between ARM-based Embedded-R and x86-based second generation R-Series APU solutions. NFV is related to, but independent of, software defined networking (SDN). Network Functions Virtualization is essentially the virtualizing of network appliances with specific functions and performing those functions virtually using generic servers. For example, NFV can virtualize firewalls, gateways, load balancers, intrusion detection, DNS, NAT, and caching functions. NFV virtualizes the upper networking layers (layers 4-7) and can allow virtual tunnels through a network that can then be assigned functions (such as those listed above) on a per-VM or per flow basis. NFV eliminates the need for specialized hardware appliances by virtualizing these functions on generic servers which have traditionally been exclusively x86 based. AMD is hoping to push ARM (and it's own ARM-based SoCs) into this market by touting even further capital expenditure and operational costs versus x86 (and, in turn, versus specialized hardware that serves the entire network whereas NFV can be more exactly provisioned).

It is an interesting take on a lucrative networking market which is dealing with 1.4 Zetabytes of global IP traffic per year. I'm interested to see if the telecoms and other enterprise network customers will bite and give AMD a slice of this pie on the low end and low power fronts.

AMD "Hierofalcon" Embedded R Series SoC

Hierofalcon is the code name for AMD's 64-bit SoC with ARM CPU cores intended for the embedded market. The SoC is a 15W to 30W chip featuring up to eight ARM Cortex-A57 CPU cores capable of hitting 2GHz, two 64-bit ECC capable DDR3 or DDR4 memory channels, 10Gb Ethernet, PCI-E 3.0, ARM TrustZone, and a cryptographic security co-processor.The TechCon demonstration was also used to launch the AMD NFV Reference Solution which is compliant with OpenDataPlane platform. The reference platform includes a networking software stack from Aricent and an Embedded Linux OS and software tools (Sourcery CodeBench) from Mentor Graphics. The OpenDataPlane demonstration featured the above mentioned Evolved Packet Core application on the Hierofalcon 64-bit ARM SoC. Additionally, the x86-based R-Series APU, OpenStack, and Data Plane Development Kit all make up the company's NFV reference solution. 

Source: AMD

Move over Intel, AMD has an announcement too

Subject: General Tech | September 10, 2013 - 04:10 PM |
Tagged: Steppe Eagle, SoC, Hierofalcon, GCN, Bald Eagle, amd, Adelaar

AMD have announced their new mobile roadmap and have changed their naming scheme drastically for these new processors.  The first of their ARM based processors will be called Hierofalcon and feature up to eight Cortex A57 processors capable of hitting 2GHz with a pair of 64-bit ECC DDR3 or DDR4 memory channels.  It will be a true SoC and feature both network and PCIe controllers as well as support for ARM's TrustZone.  Bald Eagle will have Steamroller cores and will be low TDP processors with a maximum of 35W and allow you to configure the maximum TDP to even lower levels if you so wish.  The final announcement dealt with the new GCN-based embedded series of GPUs called Adelaar which arrive in three different packages, a multi-chip module, a mobile PCIe module and a discrete GPU.  You can glean a bit more about these new families at DigiTimes.  

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"AMD has disclosed its roadmap for the embedded computing market, as it becomes the first company to offer both ARM and x86 processor solutions for low-power and high-performance embedded compute designs. The new lineup includes two x86 accelerated processing units (APUs) and CPUs, a high-performance ARM system-on-chip (SoC) and a new family of discrete AMD Embedded Radeon graphics processing units (GPUs) expected to launch in 2014."

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Source: DigiTimes