Subject: Storage, Shows and Expos | August 7, 2014 - 02:37 PM | Allyn Malventano
Tagged: ssd, SM2256, silicon motion, sata, FMS 2014, FMS
Silicon Motion has announced their SM2256 controller. We caught a glimpse of this new controller on the Flash Memory Summit show floor:
The big deal here is the fact that this controller is a complete drop-in solution that can drive multiple different types of flash, as seen below:
The SM2256 can drive all variants of TLC flash.
The controller itself looks to have decent specs, considering it is meant to drive 1xnm TLC flash. Just under 100k random 4k IOPS. Writes are understandably below the max saturation of SATA 6Gb/sec at 400MB/sec (writing to TLC is tricky!). There is also mention of Silicon Motion's NANDXtend Technology, which claims to add some extra ECC and DSP tech towards the end of increasing the ability to correct for bit errors in the flash (more likely as you venture into 8 bit per cell territory).
Subject: Storage, Shows and Expos | August 7, 2014 - 02:25 PM | Allyn Malventano
Tagged: ssd, sata, PS5007, PS3110, phison, pcie, FMS 2014, FMS
At the Flash Memory Summit, Phison has updated their SSD controller lineup with a new quad-core SSD controller.
The PS3110 is capable of handling TLC as well as MLC flash, and the added horsepower lets it push as high as 100k IOPS.
Also seen was an upcoming PS5007 controller, capable of pushing PCIe 3.0 x4 SSDs at 300k IOPS and close to 3GB/sec sequential throughputs. While there were no actual devices on display of this new controller, we did spot the full specs:
Full press blast on the PS3110 appears after the break:
Subject: General Tech, Storage, Shows and Expos | August 7, 2014 - 11:17 AM | Scott Michaud
Tagged: ssd, phase change memory, PCM, hgst, FMS 2014, FMS
According to an HGST press release, the company will bring an SSD based on phase change memory to the 2014 Flash Memory Summit in Santa Clara, California. They claim that it will actually be at their booth, on the show floor, for two days (August 6th and 7th).
The device, which is not branded, connects via PCIe 2.0 x4. It is designed for speed. It is allegedly capable of 3 million IOPS, with just 1.5 microseconds required for a single access. For comparison, the 800GB Intel SSD DC P3700, recently reviewed by Allyn, had a dominating lead over the competitors that he tested. It was just shy of 250 thousand IOPS. This is, supposedly, about twelve times faster.
While it is based on a different technology than NAND, and thus not directly comparable, the PCM chips are apparently manufactured at 45nm. Regardless, that is significantly larger lithography than competing products. Intel is manufacturing their flash at 20nm, while Samsung managed to use a 30nm process for their recent V-NAND launch.
What does concern me is the capacity per chip. According to the press release, it is 1Gb per chip. That is about two orders of magnitude smaller than what NAND is pushing. That is, also, the only reference to capacity in the entire press release. It makes me wonder how small the total drive capacity will be, especially compared to RAM drives.
Of course, because it does not seem to be a marketed product yet, nothing about pricing or availability. It will almost definitely be aimed at the enterprise market, though (especially given HGST's track record).
*** Update from Allyn ***
I'm hijacking Scott's news post with photos of the actual PCM SSD, from the FMS show floor:
In case you all are wondering, yes, it does in fact work:
One of the advantages of PCM is that it is addressed at smaller sections as compared to typical flash memory. This means you can see ~700k *single sector* random IOPS at QD=1. You can only pull off that sort of figure with extremely low IO latency. They only showed this output at their display, but ramping up QD > 1 should reasonably lead to the 3 million figure claimed in their release.
Subject: Storage, Shows and Expos | August 6, 2014 - 12:03 PM | Allyn Malventano
Tagged: ssd, pcie, NVMe, Marvell, FMS 2014, FMS, controller, 88SS1093
Marvell is notorious for being the first to bring a 6Gb/sec SATA controller to market, and they continue to do very well in that area. Their very capable 88SS9189 controller powers the Crucial MX100 and M550, as well as the ADATA SP920.
Today they have announced a newer controller, the 88SS1093. Despite the confusing numbering, the 88SS1093 has a PCIe 3.0 x4 host interface and will support the full NVMe protocol. The provided specs are on the light side, as performance of this controller will ultimately depend on the speed and parallelism of the attached flash, but its sure to be a decent performer. I suspect it would behave like their SATA part, only no longer bottlenecked by SATA 6Gb/sec speeds.
More to follow as I hope to see this controller in person on the exhibition hall (which opens to press in a few hours). Full press blast after the break.
*** Update ***
Apologies as there was no photo to be taken - Marvell had no booth at the exibition space at FMS.
Subject: Storage, Shows and Expos | August 5, 2014 - 01:19 PM | Allyn Malventano
Tagged: FMS, vnand, tlc, ssd, Samsung, FMS 2014, Flash Memory Summit
Just minutes ago at the Flash Memory Summit, Samsung announced the production of 32-layer TLC VNAND:
This is the key to production of a soon-to-be-released 850 EVO, which should bring the excellent performance of the 850 Pro, with the reduced cost benefit we saw with the previous generation 840 EVO. Here's what the progression to 3D VNAND looks like:
3D TLC VNAND will look identical to the right most image in the above slide, but the difference will be that the charge stored has more variability. Given that Samsung's VNAND tech has more volume to store electrons when compared to competing 2D planar flash technology, it's a safe bet that this new TLC will come with higher endurance ratings than those other technologies. There is much more information on Samsung's VNAND technology on page 1 of our 850 Pro review. Be sure to check that out if you haven't already!
Another announcement made was more of an initiative, but a very interesting one at that. SSDs are generally dumb when it comes to coordinating with the host - in that there is virtually no coordination. An SSD has no idea which pieces of files were meant to be grouped together, etc (top half of this slide):
Stuff comes into the SSD and it puts it where it can based on its best guess as to how it should optimize those writes. What you'd want to have, ideally, is a more intelligent method of coordination between the host system and the SSD (more like the bottom half of the above slide). Samsung has been dabbling in the possibilities here and has seen some demonstrable gains to be made. In a system where they made the host software aware of the SSD flash space, and vice versa, they were able to significantly reduce write latency during high IOPS activity.
The key is that if the host / host software has more control over where and how data is stored on the SSD, the end result is a much more optimized write pattern, which ultimately boosts overall throughput and IOPS. We are still in the experimentation stage on Storage Intelligence, with more to follow as standards are developed and the industry pushes forward.
It might be a while before we see Storage Intelligence go mainstream, but I'm definitely eager to see 3D TLC VNAND hit the market, and now we know it's coming! More to follow in the coming days as we continue our live coverage of the Flash Memory Summit!
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