Subject: Processors | April 27, 2015 - 06:06 PM | Josh Walrath
Tagged: Zen, Steamroller, Kaveria, k12, Excavator, carrizo, bulldozer, amd
There are some pretty breathless analysis of a single leaked block diagram that is supposedly from AMD. This is one of the first indications of what the Zen architecture looks like from a CPU core standpoint. The block diagram is very simple, but looks in the same style as what we have seen from AMD. There are some labels, but this is almost a 50,000 foot view of the architecture rather than a slightly clearer 10,000 foot view.
There are a few things we know for sure about Zen. It is a clean sheet design that moves away from what AMD was pursuing with their Bulldozer family of cores. Zen gives up CMT for SMT support for handling more threads. The design has a cluster of four cores sharing 8 MB of L3 cache, with each core having access to 512 KB of L2 cache. There is a lot of optimism that AMD can kick the trend of falling more and more behind Intel every year with this particular design. Jim Keller is viewed very positively due to his work at AMD in the K7 through K8 days, as well as what he accomplished at Apple with their ARM based offerings.
One of the first sites to pick up this diagram wrote quite a bit about what they saw. There was a lot of talk about, “right off the bat just by looking at the block diagram we can tell that Zen will have substantially higher single threaded performance compared to Excavator and the Bulldozer family.” There was the assumption that because it had two 256-bit FMACs that it could fuse them to create a single 512 bit AVX product.
These assumptions are pretty silly. This is a very simple block diagram that answers few very important questions about the architecture. Yes, it shows 6 int pipelines, but we don’t know how many are address generation vs. execution units. We don’t know how wide decode is. We don’t know latency to L2 cache, much less how L3 is connected and shared out. So just because we see more integer pipelines per core does not automatically mean, “Da, more is better, strong like tractor!” We don’t know what improvements or simplifications we will see in the schedulers. There is no mention of the front-end other than Fetch and Decode. How about Branch Prediction? What is the latency for the memory controller when addressing external memory?
Essentially, this looks like a simplified way of expressing to analysts that AMD is attempting to retain their per core integer performance while boosting floating point/AVX at a similar level. Other than that, there is very little that can be gleaned from this simple block diagram.
Other leaks that are interesting concerning Zen are the formats that we will see these products integrated into. One leak detailed a HPC aimed APU that features 16 Zen cores with 32 MB of L3 cache attached to a very large GPU. Another leak detailed a server level chip that will support 32 cores and will be seen in 2P systems. Zen certainly appears to be very flexible, and in ways it reminds me of a much beefier Jaguar type CPU. My gut feeling is that AMD will get closer to Intel than it has been in years, and perhaps they can catch Intel by surprise with a few extra features. The reality of the situation is that AMD is far behind and only now are we seeing pure-play foundries start to get even close to Intel in terms of process technology. AMD is very much at a disadvantage here.
Still, the company needs to release new, competitive products that will refill the company coffers. The previous quarter’s loss has dug into cash reserves, but AMD is still stable in terms of cash on hand and long term debt. 2015 will see new GPUs, an APU refresh, and the release of the new Carrizo parts. 2016 looks to be the make or break year with Zen and K12.
Edit 2015-04-28: Thanks to SH STON we have a new slide that has been leaked from the same deck as this one. This has some interesting info in that AMD may be going away from exclusive cache designs. Exclusive was a good idea when cache was small and expensive, as data was not replicated through each level of cache (L1 was not replicated in L2 and L2 was not replicated in L3). Intel has been using inclusive cache since forever, where data is replicated and simpler to handle. Now it looks like AMD is moving towards inclusive. This is not necessarily a bad thing as the 512 KB of L2 can easily handle what looks to be 128 KB of L1 and the shared 8 MB of L3 cache can easily handle the 2 MB of L2 data. Here is the link to that slide.
The new slide in question.
Subject: Processors | February 24, 2015 - 06:18 PM | Jeremy Hellstrom
Tagged: Puma+, Puma, Kaveri, ISSCC 2015, ISSCC, GCN, Excavator, Carrizo-L, carrizo, APU, amd
While it is utterly inconceivable that Josh might have missed something in his look at Carrizo, that hasn't stopped certain Canadians from talking about Gila County, Arizona. AMD's upcoming processor launch is a little more interesting than just another Phenom II launch, especially for those worried about power consumption. With Adaptive Voltage and Frequency Scaling the new Excavator based chips will run very well at the sub-15W per core pair range which is perfect for POS, airplane entertainment and even in casinos. The GPU portion speaks to those usage scenarios though you can't expect an R9 295 at that wattage. Check out Hardware Canucks' coverage right here.
"AMD has been working hard on their mobile Carrizo architecture and they're now releasing some details about these Excavator architecture-equipped next generation APUs."
Here are some more Processor articles from around the web:
- AMD's new Carrizo: The x86 notebook processor that thinks it's a GPU @ The Register
- AMD Carrizo APU Details Revealed @ TechARP
- AMD FX-8320E Performance On Linux @ Phoronix
- Intel Broadwell HD Graphics 5500: Windows 8.1 vs. Linux @ Phoronix
- Preliminary Tests Of Intel Sandy Bridge & Ivy Bridge vs. Broadwell @ Phoronix
AMD Details Carrizo Further
Some months back AMD introduced us to their “Carrizo” product. Details were slim, but we learned that this would be another 28 nm part that has improved power efficiency over its predecessor. It would be based on the new “Excavator” core that will be the final implementation of the Bulldozer architecture. The graphics will be based on the latest iteration of the GCN architecture as well. Carrizo would be a true SOC in that it integrates the southbridge controller. The final piece of information that we received was that it would be interchangeable with the Carrizo-L SOC, which is a extremely low power APU based on the Puma+ cores.
A few months later we were invited by AMD to their CES meeting rooms to see early Carrizo samples in action. These products were running a variety of applications very smoothly, but we were not informed of speeds and actual power draw. All that we knew is that Carrizo was working and able to run pretty significant workloads like high quality 4K video playback. Details were yet again very scarce other than the expected timeline of release, the TDP ratings of these future parts, and how it was going to be a significant jump in energy efficiency over the previous Kaveri based APUs.
AMD is presenting more information on Carrizo at the ISSCC 2015 conference. This information dives a little deeper into how AMD has made the APU smaller, more power efficient, and faster overall than the previous 15 watt to 35 watt APUs based on Kaveri. AMD claims that they have a product that will increase power efficiency in a way not ever seen before for the company. This is particularly important considering that Carrizo is still a 28 nm product.
Subject: Processors | November 20, 2014 - 01:31 PM | Josh Walrath
Tagged: amd, APU, carrizo, Carrizo-L, Kaveri, Excavator, Steamroller, SoC, Intel, mobile
AMD has certainly gone about doing things in a slightly different manner than we are used to. Today they announced their two latest APUs which will begin shipping in the first half of 2015. These APUs are running at AMD and are being validated as we speak. AMD did not release many details on these products, but what we do know is pretty interesting.
Carrizo is based on the latest iteration of AMD’s CPU technology. Excavator is the codename for these latest CPU cores, and they promise to be smaller and more efficient than the previous Steamroller core which powers the latest Kaveri based APUs. Carrizo-L is the lower power variant which will be based on the Puma+ core. The current Beema APU is based on the Puma architecture.
Roadmaps show that the Carrizo APUs will be 28 nm products, presumably fabricated by GLOBALFOUNDRIES. Many were hoping that AMD would make the jump to 20 nm with this generation of products, but that does not seem to be the case. This is not surprising due to the limitations of that particular process when dealing with large designs that require a lot of current. AMD will likely be pushing for 16 nm FinFET for the generation of products after Carrizo.
The big Carrizo supposedly has a next generation GCN unit. My guess here is that it will use the same design as we saw with the R9 285. That particular product is a next generation unit that has improved efficiency. AMD did not release how many GCN cores will be present in Carizzo, but it will be very similar to what we see now with Kaveri. Carrizo-L will use the same GCN units as the previous generation Beema based products.
I believe AMD has spent a lot more time hand tuning Excavator instead of relying on a lot of automated place and route. This should allow them to retain much of the performance of the part, all the while cutting down on transistor count dramatically. Some rumors that I have seen point to each Excavator module being 40% smaller than Steamroller. I am not entirely sure they have achieved that type of improvement, but more hand layout does typically mean greater efficiency and less waste. The downside to hand layout is that it is extremely time and manpower intensive. Intel can afford this type of design while AMD has to rely more on automated place and route.
Carrizo will be the first HSA 1.0 compliant SOC. It is in fact an SOC as it integrates the southbridge functions that previously had been handled by external chips like the A88X that supports the current Kaveri desktop APUs. Carrizo and Carrizo-L will also share the same infrastructure. This means that motherboards that these APUs will be soldered onto are interchangeable. One motherboard from the partner OEMs will be able to address multiple markets that will see products range from 4 watts TDP up to 35 watts.
Finally, both APUs feature the security processor that allows them access to the ARM TrustZone technology. This is a very small ARM processor that handles the secure boot partition and handles the security requests. This puts AMD on par with Intel and their secure computing solution (vPro).
These products will be aimed only at the mobile market. So far AMD has not announced Carrizo for the desktop market, but when they do I would imagine that they will hit a max TDP of around 65 watts. AMD claims that Carrizo is one of the biggest jumps for them in terms of power efficiency. A lot of different pieces of technology have all come together with this product to make them more competitive with Intel and their process advantage. Time will tell if this is the case, but for now AMD is staying relevant and pushing their product releases so that they are more consistently ontime.
Subject: General Tech | October 7, 2014 - 12:57 PM | Jeremy Hellstrom
Tagged: mobile apu, Excavator, Carrizo-L, carrizo, amd, 28nm
Kaveri, Beema and Mullins are on their way out to be replaced by the Excavator based Carrizo family towards the end of the year. We can hope they will appear in products in time for Christmas as the low power Carrizo-L, rumoured to be around 12-35W TDP, will arrive. In the new year the more powerful Carrizo, speculated at 45-65W TDP, will be available. It is unclear how long the delay will be between availability to system builders and the products appearing on the market. The chips will support DDR3, contain a GPU based on GCN 3.0 and stacked on-package memory which will be accessible by Through Silicon Via to act as a sort of L3 cache for HSA applications. DigiTimes also mentions it will run Win8 and Win10 as well as SLED.
"AMD is planning to announce next-generation Carrizo APUs in March 2015 to replace its existing Kaveri APUs for the mainstream performance notebook segment and will release Carrizo-L APUs for the entry-level notebook segment in December 2014 at the earliest to challenge Intel's Pentium and Celeron processors, according to sources from notebook players."
Here is some more Tech News from around the web:
- Hard for Samsung to compete with TSMC for Apple A9 processor orders, say Taiwan makers @ DigiTimes
- Hot DRAM! Samsung splurges $15 BILLION on Korean chip fab @ The Register
- Windows 10 Technical Preview hands-on review @ The Inquirer
- A Production-Ready Flying Car Is Coming This Month @ Slashdot
- Win an X99S Gaming 7 motherboard with KitGuru and MSI
Another Boring Presentation...?
In my old age I am turning into a bit of a skeptic. It is hard to really blame a guy; we are surrounded by marketing and hype, both from inside companies and from their fans. When I first started to listen in on AMD’s Core Innovation Update presentation, I was not expecting much. I figured it would be a rehash of the past year, more talk about Mullins/Beema, and some nice words about some of the upcoming Kaveri mobile products.
I was wrong.
AMD decided to give us a pretty interesting look at what they are hoping to accomplish in the next three years. It was not all that long ago that AMD was essentially considered road kill, and there was a lot of pessimism that Rory Read and Co. could turn AMD around. Now after a couple solid years of growth, a laser-like focus on product development based on the IP strengths of the company, and a pretty significant cut of the workforce, we are seeing an AMD that is vastly different from the one that Dirk Meyers was in charge of (or Hector Ruiz for that matter). Their view for the future takes a pretty significant turn from where AMD was even 8 years ago. x86 certainly has a future for AMD, but the full-scale adoption of the ARM architecture looks to be what finally differentiates this company from Intel.
Look, I’m Amphibious!
AMD is not amphibious. They are working on being ambidextrous. Their goal is not only to develop and sell x86 based processors, but also be a prime moving force in the ARM market. AMD has survived against a very large, well funded, and aggressive organization for the past 35 years. They believe their experience here can help them break into, and thrive within, the ARM marketplace. Their goals are not necessarily to be in every smartphone out there, but they are leveraging the ARM architecture to address high growth markets that have a lot of potential.
There are really two dominant architectures in the world with ARM and x86. They power the vast majority of computing devices around the world. Sure, we still have some Power and MIPS implementations, but they are dwarfed by the combined presence of x86 and ARM in modern devices. The flexibility of x86 allows it to scale from the extreme mobile up to the highest performing clusters. ARM also has the ability to scale in performance from handhelds up to the server world, but so far their introduction into servers and HPC solutions has been minimal to non-existent. This is an area that AMD hopes to change, but it will not happen overnight. A lot of infrastructure is needed to get ARM into that particular area. Ask Intel how long it took for x86 to gain a handhold in the lucrative server and workstation markets.
Retiring the Workhorses
There is an inevitable shift coming. Honestly, this has been quite obvious for some time, but it has just taken AMD a bit longer to get here than many have expected. Some years back we saw AMD release their new motto, “The Future is Fusion”. While many thought it somewhat interesting and trite, it actually foreshadowed the massive shift from monolithic CPU cores to their APUs. Right now AMD’s APUs are doing “ok” in desktops and are gaining traction in mobile applications. What most people do not realize is that AMD will be going all APU all the time in the very near future.
We can look over the past few years and see that AMD has been headed in this direction for some time, but they simply have not had all the materials in place to make this dramatic shift. To get a better understanding of where AMD is heading, how they plan to address multiple markets, and what kind of pressures they are under, we have to look at the two major non-APU markets that AMD is currently hanging onto by a thread. In some ways, timing has been against AMD, not to mention available process technologies.
Subject: General Tech | August 27, 2013 - 12:30 PM | Jeremy Hellstrom
Tagged: amd, roadmap, 2014, Kaveri, Kabini, carrizo, beema, Excavator, Nolan, 2015, socket sf1b
As is usually the case, AMD will not comment on the accuracy of DigiTimes information but as we have seen in the past their roadmaps have been spot on. Over the next 8 months or so will see the arrival of the Hawaii GPU family and the entrance of Kaveri and Kabini chips, nothing new there but good to have independent confirmation. In the latter part of 2014 and 2015 things are a little more interesting as Beema will replace Kabini with an HSA compliant architecture and use a new socket called FS1B. In 2015 Beema will be replaced by a chip called Nolan and we will finally see the Excavator based Carrizo which are slated to have 45W and 65W versions.
You can expect to see FM1 and AM3 phased out of active production by the end of 2013, with AM3+ and FM2 being the two active sockets until FS1B arrives.
"AMD has recently updated its product roadmap and is set to release its Hawaii-based GPUs at the end of September, Kaveri-based APUs for the high-end segment and Kabini-based APUs for the entry-level segment in the first quarter of 2014, according to sources from the upstream supply chain."
Here is some more Tech News from around the web:
- What Surface RT flop? Nokia said to be readying WinRT slab for September @ The Register
- Java 6 exploit found in the wild @ The Inquirer
- Chlorine has got graphene covered @ Nanotechweb
- Samsung will launch a 55in curved OLED 3D TV in the UK on 5 September @ The Inquirer
- The 20 most bizarre and innovative motherboards: 1999 - 2010 @ Hardware.Info
- NAND flash vendors gearing up for 3D chips @ DigiTimes
- Epic Games’ Tim Sweeney and AMD don’t see eye-to-eye on hUMA @ VR-Zone
- Linksys Smart Wi-Fi Router EA6500 @ Kitguru
- TP-Link TL-PA551KIT AV550+ Gigabit Powerline Kit With AC Passthrough @ eTeknix
- Making S’mores with 50,000 Volts @ Hack a Day