IDF 2014 Storage Roundup - RAM and NVMe and IOPS! Oh my!

Subject: Storage, Shows and Expos | September 16, 2014 - 12:49 PM |
Tagged: ram, NVMe, IOPS, idf 2014, idf, ddr4, DDR

The Intel Developer Forum was last week, and there were many things to be seen for sure. Mixed in with all of the wearable and miniature technology news, there was a sprinkling of storage goodness. Kicking off the show, we saw new cold storage announcements from both HGST and Western Digital, but that was about it for HDD news, as the growing trend these days is with solid state storage technologies. I'll start with RAM:

First up was ADATA, who were showing off 64GB DDR3 (!) DIMMs:

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Next up were various manufacturers pushing DDR4 technology quite far. First was SK Hynix's TSV 128GB DIMMs (covered in much greater depth last week):

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Next up is Kingston, who were showing a server chassis equipped with 256GB of DDR4:

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If you look closer at the stats, you'll note there is more RAM in this system than flash:

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Next up is IDT, who were showing off their LRDIMM technology:

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This technology adds special data buffers to the DIMM modules, enabling significantly higher amounts of installed RAM into a single system, with a 1-2 step de-rating of clock speeds as you take capacities to the far extremes. The above server has 768GB of DDR4 installed and running!:

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Moving onto flash memory type stuff, Scott covered Intel's new 40 Gbit Ethernet technology last week. At IDF, Intel had a demo showing off some of the potential of these new faster links:

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This demo used a custom network stack that allowed a P3700 in a local system to be matched in IOPS by an identical P3700 *being accessed over the network*. Both local and networked storage turned in the same 450k IOPS, with the remote link adding only 8ms of latency. Here's a close-up of one of the SFF-8639 (2.5" PCIe 3.0 x4) SSDs and the 40 Gbit network card above it (low speed fans were installed in these demo systems to keep some air flowing across the cards):

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Stepping up the IOPS a bit further, Microsoft was showing off the capabilities of their 'Inbox AHCI driver', shown here driving a pair of P3700's at a total of 1.5 million IOPS:

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...for those who want to get their hands on this 'Inbox driver', guess what? You already have it! "Inbox" is Microsoft's way of saying the driver is 'in the box', meaning it comes with Windows 8. Bear in bind you may get better performance with manufacturer specific drivers, but it's still a decent showing for a default driver.

Now for even more IOPS:

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Yes, you are reading that correctly. That screen is showing a system running over 11 million IOPS. Think it's RAM? Wrong. This is flash memory pulling those numbers. Remember the 2.5" P3700 from a few pics back? How about 24 of them:

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The above photo shows three 2U systems (bottom), which are all connected to a single 2U flash memory chassis (top). The top chassis supports three submodules, each with eight SFF-8639 SSDs. The system, assembled by Newisys, demonstrates just how much high speed flash you can fit within an 8U space. The main reason for connecting three systems to one flash chassis is because it takes those three systems to process the full IOPS capability of 24 low latency NVMe SSDs (that's 96 total lanes of PCIe 3.0!)!

So there you have it, IDF storage tech in a nutshell. More to come as we follow these emerging technologies to their maturity.

Samsung and Micron Developing Hybrid Memory Cube Technology

Subject: Memory | October 7, 2011 - 08:52 AM |
Tagged: memory, hybrid memory cube, HMC, micron, Intel, Samsung, ram, DDR, DRAM

Micron Technology and Samsung Electronics, in cooperation with Intel, Altera Corporation, Open Silicon, and Xilinx among others have formed the “Hybrid Memory Cube Consortium” to develop and encourage adoption of a new storage interface specification. This new storage technology is based on Hybrid Memory Cube (HMC) technology, which is comprised of PCB, a thin logic layer, and stacks of DRAM chips. These memory chips are stacked vertically on top of one another and connected via TSV.

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A mock up of a HMC (Source: CNET)

According to Tech Connect Magazine, Micron’s Vice President for DRAM Marketing is quoted in stating “HMC brings a new level of capability to memory that provides exponential performance and efficiency gains.” Hybrid Memory Cube technology is claimed to be capable of using 70% less power than current DDR3 memory modules (DIMMs) while being up to 15 times faster.

Reinforcing Micron’s position is Intel’s CTO Justin Rattner who talked very highly of the technology and it’s massive bandwidth and I/O improvements versus traditional DDR style memory designs. The Hybrid Memory Cube is capable of sustained transfer rates of 1 terabit per second, and is “the most energy efficient DRAM ever built” by a bits transferred per amount of energy consumed.

Both Intel and Micron have expressed that the HMC technology will be a boon for data centers and high performance computing that demands low power and high bandwidth memory storage. Assuming the numbers pan out, the Hybrid Memory Cube will be quite a leap in memory efficiency and will further accelerate adoption rates of so called “cloud” applications as well as more efficient high performance servers used in scientific research endeavors. All in all, the idea of the Hybrid Memory Cube is cool stuff, and it will be interesting to see if the actual memory will live up to its grandeur name.