Subject: Motherboards | May 4, 2015 - 02:49 PM | Sebastian Peak
Tagged: processor, msi, motherboard, Godavari, FM2+, cpu, APU, amd
MSI has revealed a new FM2+ motherboard lineup with support for upcoming AMD Godavari processors, further indicating the launch of these new CPUs will be very soon though no official announcement has yet been made by AMD.
As reported back in January when the lineup allegedly leaked the new Godavari SKUs feature higher clocks on both processor and, more significantly, in GPU cores in upcoming APUs like the rumored 8850K. MSI states that "these new models are available in ATX, micro-ATX, and mini-ATX form factors and are backwards compatible with FM2 processors (Kaveri, Richland, Trinity, 6000 and 5000 series)", so it makes sense to consider these new models for future compatibility if shopping for an FM2 motherboard today. It remains to be seen if vendors will offer support for Godavari through BIOS updates, though it does at least seem likely.
For those interested here is the list of new MSI AMD FM2+/FM2 motherboard models:
- A68HM-E33 V2
- A88XM-E45 V2
- A78M-E35 V2
- A88XM-P33 V2
- A78M-E45 V2
- A88X-G41 PC Mate V2
- A88XM-E35 V2
- A88XI AC V2
The familiar Military Class 4 and OC Genie 4 branding is visible across the lineup, and the new models also feature "a rich blend of features and technologies, such as onboard LAN, PCI Express 3.0 x16, SATA 6Gb/s, USB 3.0 and multiple display support".
Early in April ASUS and AMD announced that the MG279Q display, first shown at CES in January, would be brought into the world of FreeSync and officially adopt AMD's branding. The original post from the AMD Twitter account clearly mentions the display would support 144 Hz refresh rates, an increase from the 120 Hz that ASUS claimed during CES.
Now however, we have some complications to deal with. According to a FAQ posted on the ASUS.com website, FreeSync variable refresh rates will only be supported in a range of 35 - 90 Hz.
Enable FreeSync™ in the MG279’s OSD setting, choose PC’s refresh rate timing between 35-90Hz (DP/miniDP only)
On the positive, that 35 Hz lower limit would be the best we have seen on any FreeSync monitor to date. And while the 90 Hz upper limit isn't awful (considering we have seen both 75 Hz and 144 Hz limits on current monitors), it does the beg the question as to why it would be LOWER than the 144 Hz quoted maximum overall refresh rate of the display.
The ASUS MG279Q is an IPS-style display so the quality of the screen should be top notch, but that doesn't alone answer why the upper FreeSync limit and upper refresh rate would not match. We already have the Acer Predator XB270HU G-Sync display in-house that operates at a variable refresh rate as high as 144 Hz with a similar quality IPS display. I've inquired to both AMD and ASUS about the reasoning for this 90 Hz limit, and we'll see if either side cares to comment prior to the display's release.
Subject: Graphics Cards | April 30, 2015 - 08:28 PM | Sebastian Peak
Tagged: PC Gamer, gpu, Fiji, E3 2015, amd
We haven’t had much more than rumor and speculation about upcoming AMD graphics for a while now, but there is more than enough fresh fuel for the GPU fire today to ignore completely. It seems that AMD and PC Gamer magazine have teamed up to announce a special (what else) PC gaming event at this year’s E3 show on June 16, and this would be the perfect place for some new hardware announcements.
Not enough for you? Well, while the AMD Fiji GPU rumors are nothing new to followers of industry news, it has now been indirectly announced that the upcoming Fiji GPU from AMD will in fact feature 2.5D high-bandwidth memory (HBM). As reported by tech news/rumor site wccftech the announcement came via the official schedule for the upcoming Hot Chips symposium, which is slated for August 23-25 in Cupertino, California.
This screenshot was taken this morning from the official online event schedule
(Note: This part of the day 2 schedule has now been changed to read “AMD’s Next Generation GPU and Memory Architecture”, with all mention of Fiji and HBM removed.)
Whether this gives us insight into the actual release date of the long-awaited Fiji GPU from AMD is unclear, but new AMD GPU products certainly seem to be imminent as we move into the summer months. Speculation is fun (for a while), but hopefully the PC gaming event at E3 in June will provide at least some official news from AMD on the new GPU products we've been waiting for.
Some Fresh Hope for 2016
EDIT 2015-05-07: A day after the AMD analyst meeting we now know that the roadmaps delivered here are not legitimate. While some of the information is likely correct on the roadmaps, they were not leaked by AMD. There is no FM3 socket, rather AMD is going with AM4. AMD will be providing more information throughout this quarter about their roadmaps, but for now take all of this information as "not legit".
SH SOTN has some eagle eyes and spotted the latest leaked roadmap for AMD. These roadmaps cover both mobile and desktop, from 2015 through 2016. There are obviously quite a few interesting tidbits of information here.
On the mobility roadmap we see the upcoming release of Carrizo, which we have been talking about since before CES. This will be the very first HSA 1.0 compliant part to hit the market, and AMD has done some really interesting things with the design in terms of performance, power efficiency, and die size optimizations. Carrizo will span the market from 15 watts to 35 watts TDP. This is a mobile only part, but indications point to it being pretty competent overall. This is a true SOC that will support all traditional I/O functions of older standalone southbridges. Most believe that this part will be manufactured by GLOBALFOUNDIRES on their 28 nm HKMG process that is more tuned to AMD's APU needs.
Carrizo-L will be based on the Puma+ architecture and will go from 10 watts to 15 watts TDP. This will use the same FP4 BGA connection as the big Carrizo APU. This should make these parts more palatable for OEMs as they do not have to differentiate the motherboard infrastructure. Making things easier for OEMs will give more reasons for these folks to offer products based on Carrizo and Carrizo-L APUs. The other big reason will be the GCN graphics compute units. Puma+ is a very solid processor architecture for low power products, but these parts are still limited to the older 28 nm HKMG process from TSMC.
One interesting addition here is that AMD will be introducing their "Amur" APU for the low power and ultra-low power markets. These will be comprised of four Cortex-A57 CPUs combined with AMD's GCN graphics units. This will be the first time we see this combination, and the first time AMD has integrated with ARM since ATI spun off their mobile graphics to Qualcomm under the "Adreno" branding (anagram for "Radeon"). What is most interesting here is that this APU will be a 20 nm part most likely fabricated by TSMC. This is not to say that Samsung or GLOBALFOUNDRIES might be producing it, but those companies are expending their energy on the 14 nm FinFET process that will be their bread and butter for years to come. This will be a welcome addition to the mobile market (tablets and handhelds) and could be a nice profit center for AMD if they are able to release this in a timely manner.
2016 is when things get very interesting. The Zen x86 design will dominate the upper 2/3 of the roadmap. I had talked about Zen when we had some new diagram leaks yesterday, but now we get to see the first potential products based off of this architecture. In mobile it will span from 5 watts to 35 watts TDP. The performance and mainstream offerings will be the "Bristol Ridge" APU which will feature 4 Zen cores (or one Zen module) combined with the next gen GCN architecture. This will be a 14nm part, and the assumption is that it will be GLOBALFOUNDRIES using 14nm FinFET LPP (Low Power Plus) that will be more tuned for larger APUs. This will also be a full SOC.
The next APU will be codenamed "Basilisk" that will span the 5 watt to 15 watt range. It will be comprised of 2 Zen cores (1/2 of a Zen module) and likely feature 2 to 4 MB of L3 cache, depending on power requirements. This looks to be the first Skybridge set of APUs that will share the same infrastructure as the ARM based Amur SOC. FT4 BGA is the basis for both the 2015 Amur and 2016 Basilisk SOCs.
Finally we have the first iteration of AMD's first ground up implementation of ARM's ARMv8-A ISA. The "Styx" APU features the new K12 CPU cores that AMD has designed from scratch. It too will feature the next generation GCN units as well as share the same FT4 BGA connection. Many are anxiously watching this space to see if AMD can build a better mousetrap when it comes to licensing the ARM ISA (as have Qualcomm, NVIDIA, and others).
2015 shows no difference in the performance desktop space, as it is still serviced by the now venerable Piledriver based FX parts on AM3+. The only change we expect to see here is that there will be a handful of new motherboard offerings from the usual suspects that will include the new USB 3.1 functionality derived from a 3rd party controller.
Mainstream and Performance will utilize the upcoming Godavari APUs. These are power and speed optimized APUs that are still based on the current Kaveri design. These look to be a simple refresh/rebadge with a slight performance tweak. Not exciting, but needs to happen for OEMs.
Low power will continue to be addressed by Beema based APUs. These are regular Puma based cores (not Puma+). AMD likely does not have the numbers to justify a new product in this rather small market.
2016 is when things get interesting again. We see the release of the FM3 socket (final proof that AM3+ is dead) that will house the latest Zen based APUs. At the top end we see "Summit Ridge" which will be composed of 8 Zen cores (or 2 Zen modules). This will have 4 MB of L2 cache and 16 MB of L3 cache if our other leaks are correct. These will be manufactured on 14nm FinFET LPE (the more appropriate process product for larger, more performance oriented parts). These will not be SOCs. We can expect these to be the basis of new Opterons as well, but there is obviously no confirmation of that on these particular slides. This will be the first new product in some years from AMD that has the chance to compete with higher end desktop SKUs from Intel.
From there we have the lower power Bristol Ridge and Basilisk APUs that we already covered in the mobile discussion. These look to be significant upgrades from the current Kaveri (and upcoming Godavari) APUs. New graphics cores, new CPU cores, and new SOC implementations where necessary.
AMD will really be shaking up the game in 2016. At the very least they will have proven that they can still change up their game and release higher end (and hopefully competitive) products. AMD has enough revenue and cash on hand to survive through 2016 and 2017 at the rate they are going now. We can only hope that this widescale change will allow AMD to make some significant inroads with OEMs on all levels. Otherwise Intel is free to do what they want and what price they want across multiple markets.
ARM Releases Cortex-A72 for Licensing
On February 3rd, ARM announced a slew of new designs, including the Cortex A72. Few details were shared with us, but what we learned was that it could potentially redefine power and performance in the ARM ecosystem. Ryan was invited to London to participate in a deep dive of what ARM has done to improve its position against market behemoth Intel in the very competitive mobile space. Intel has a leg up on process technology with their 14nm Tri-Gate process, but they are continuing to work hard in making their x86 based processors more power efficient, while still maintaining good performance. There are certain drawbacks to using an ISA that is focused on high performance computing rather than being designed from scratch to provide good performance with excellent energy efficiency.
ARM has been on a pretty good roll with their Cortex A9, A7, A15, A17, A53, and A57 parts over the past several years. These designs have been utilized in a multitude of products and scenarios, with configurations that have scaled up to 16 cores. While each iteration has improved upon the previous, ARM is facing the specter of Intel’s latest generation, highly efficient x86 SOCs based on the 2nd gen 14nm Tri-Gate process. Several things have fallen into place for ARM to help them stay competitive, but we also cannot ignore the experience and design hours that have led to this product.
(Editor's Note: During my time with ARM last week it became very apparent that it is not standing still, not satisfied with its current status. With competition from Intel, Qualcomm and others ramping up over the next 12 months in both mobile and server markets, ARM will more than ever be depedent on the evolution of core design and GPU design to maintain advantages in performance and efficiency. As Josh will go into more detail here, the Cortex-A72 appears to be an incredibly impressive design and all indications and conversations I have had with others, outside of ARM, believe that it will be an incredibly successful product.)
Cortex A72: Highest Performance ARM Cortex
ARM has been ubiquitous for mobile applications since it first started selling licenses for their products in the 90s. They were found everywhere it seemed, but most people wouldn’t recognize the name ARM because these chips were fabricated and sold by licensees under their own names. Guys like Ti, Qualcomm, Apple, DEC and others all licensed and adopted ARM technology in one form or the other.
ARM’s importance grew dramatically with the introduction of increased complexity cellphones and smartphones. They also gained attention through multimedia devices such as the Microsoft Zune. What was once a fairly niche company with low performance, low power offerings became the 800 pound gorilla in the mobile market. Billions of chips are sold yearly based on ARM technology. To stay in that position ARM has worked aggressively on continually providing excellent power characteristics for their parts, but now they are really focusing on overall performance and capabilities to address, not only the smartphone market, but also the higher performance computing and server spaces that they want a significant presence in.
Subject: Processors | April 27, 2015 - 06:06 PM | Josh Walrath
Tagged: Zen, Steamroller, Kaveria, k12, Excavator, carrizo, bulldozer, amd
There are some pretty breathless analysis of a single leaked block diagram that is supposedly from AMD. This is one of the first indications of what the Zen architecture looks like from a CPU core standpoint. The block diagram is very simple, but looks in the same style as what we have seen from AMD. There are some labels, but this is almost a 50,000 foot view of the architecture rather than a slightly clearer 10,000 foot view.
There are a few things we know for sure about Zen. It is a clean sheet design that moves away from what AMD was pursuing with their Bulldozer family of cores. Zen gives up CMT for SMT support for handling more threads. The design has a cluster of four cores sharing 8 MB of L3 cache, with each core having access to 512 KB of L2 cache. There is a lot of optimism that AMD can kick the trend of falling more and more behind Intel every year with this particular design. Jim Keller is viewed very positively due to his work at AMD in the K7 through K8 days, as well as what he accomplished at Apple with their ARM based offerings.
One of the first sites to pick up this diagram wrote quite a bit about what they saw. There was a lot of talk about, “right off the bat just by looking at the block diagram we can tell that Zen will have substantially higher single threaded performance compared to Excavator and the Bulldozer family.” There was the assumption that because it had two 256-bit FMACs that it could fuse them to create a single 512 bit AVX product.
These assumptions are pretty silly. This is a very simple block diagram that answers few very important questions about the architecture. Yes, it shows 6 int pipelines, but we don’t know how many are address generation vs. execution units. We don’t know how wide decode is. We don’t know latency to L2 cache, much less how L3 is connected and shared out. So just because we see more integer pipelines per core does not automatically mean, “Da, more is better, strong like tractor!” We don’t know what improvements or simplifications we will see in the schedulers. There is no mention of the front-end other than Fetch and Decode. How about Branch Prediction? What is the latency for the memory controller when addressing external memory?
Essentially, this looks like a simplified way of expressing to analysts that AMD is attempting to retain their per core integer performance while boosting floating point/AVX at a similar level. Other than that, there is very little that can be gleaned from this simple block diagram.
Other leaks that are interesting concerning Zen are the formats that we will see these products integrated into. One leak detailed a HPC aimed APU that features 16 Zen cores with 32 MB of L3 cache attached to a very large GPU. Another leak detailed a server level chip that will support 32 cores and will be seen in 2P systems. Zen certainly appears to be very flexible, and in ways it reminds me of a much beefier Jaguar type CPU. My gut feeling is that AMD will get closer to Intel than it has been in years, and perhaps they can catch Intel by surprise with a few extra features. The reality of the situation is that AMD is far behind and only now are we seeing pure-play foundries start to get even close to Intel in terms of process technology. AMD is very much at a disadvantage here.
Still, the company needs to release new, competitive products that will refill the company coffers. The previous quarter’s loss has dug into cash reserves, but AMD is still stable in terms of cash on hand and long term debt. 2015 will see new GPUs, an APU refresh, and the release of the new Carrizo parts. 2016 looks to be the make or break year with Zen and K12.
Edit 2015-04-28: Thanks to SH STON we have a new slide that has been leaked from the same deck as this one. This has some interesting info in that AMD may be going away from exclusive cache designs. Exclusive was a good idea when cache was small and expensive, as data was not replicated through each level of cache (L1 was not replicated in L2 and L2 was not replicated in L3). Intel has been using inclusive cache since forever, where data is replicated and simpler to handle. Now it looks like AMD is moving towards inclusive. This is not necessarily a bad thing as the 512 KB of L2 can easily handle what looks to be 128 KB of L1 and the shared 8 MB of L3 cache can easily handle the 2 MB of L2 data. Here is the link to that slide.
The new slide in question.
Subject: General Tech | April 27, 2015 - 01:04 PM | Jeremy Hellstrom
Tagged: Summit Ridge, rumours, Godavari, Bristol Ridge, amd
This morning DigiTimes is reporting on a unconfirmed rumour that AMD's new APU, Godavari, will be arriving towards the end of May of this year. This goes along with the leak that WCCFtech reported on this weekend, they have information that the chip will be a Kaveri design with up to four Steamroller cores, a GCN 1.1 base GPU with up to 512 stream processors and a dual-channel DDR3 memory in an FM2+ socket. If their information is accurate you can expect to see models with 65W or 95W TDPs and boost clocks in the 4GHz range depending on the model. Also worth noting is the rumour that AMD has placed orders with ASMedia Technology for USB 3.1 controller ICs for release in September.
"AMD will launch Godavari series APUs at the end of May to compete with Intel's Broadwell and Skylake platforms, according to Taiwan-based supply chain makers."
Here is some more Tech News from around the web:
- Apple Watch RIPPED APART, its GUTS EXPOSED to hungry Vultures @ The Register
- Debian 8.0 'Jessie' arrives following Ubuntu 15.04 release @ The Inquirer
- SoftMaker eyes Microsoft with free office suite for Android tablets @ The Inquirer
- Grooveshark faces $750 MEELLION piracy payout @ The Register
- Tech ARP 2015 Mega Giveaway
Subject: Storage | April 23, 2015 - 03:39 PM | Jeremy Hellstrom
Tagged: TVS-463 8G, qnap, NAS, amd
The QNAP TVS-463 8G is powered by an AMD GX-424CC, part of the Steppe Eagle family of SoCs which includes a Mullin's based Radeon R5E GPU. There are several models ranging from the entry level which sports only 4GB of RAM, which can be expanded to 16GB with the review model TechPowerUp recieved sitting in the middle at 8GB. You can install up to four 2.5" or 3.5" SATA3 disks in a variety of RAID configurations, the NAS ships empty so you will need to provide your own drives. It is a little expensive, just over $800, which includes the internal PSU and the built in OS to allow you to activate your NAS via the web with a simple command. It has two Gigabit ports with LACP support and you can even pick up an expansion card to increase it to 10GbE, read the full review to get an idea just how capable this NAS is.
"QNAP has for the first time used an AMD CPU with one of their NAS offerings. The new series is codenamed TVS-x63, and today, we will evaluate the TVS-463, which, as its model number implies, can take up to four HDDs. It is also 10GbE ready through an optional expansion card."
Here are some more Storage reviews from around the web:
- QNAP Turbo Station TS-431 4-Bay SOHO NAS @ eTeknix
- Thecus N4310 NAS Server Review @ NikKTech
- ASUSTOR AS5102T 2-Bay Enthusiast NAS @ eTeknix
- Samsung SM951 512GB @ Legion Hardware
- Intel 750 Series PCIe SSD 1.2 TB @ techPowerUp
- Eluktronics Eluktro Pro Performance SSD @ The SSD Review
- Patriot New Ignite Series M2 SATA Solid-State Drive @ Modders-Inc
Subject: General Tech | April 21, 2015 - 03:07 PM | Jeremy Hellstrom
Tagged: tonga, linux, carrizo, AMDGPU, amd
It will not be officially rolled in until kernel 4.2 but you can currently grab the new binary blob by following the links from Phoronix. This new AMDGPU kernel driver will be used by both the full open-source driver and the Catalyst driver provided officially by AMD and provide support not only for the R9 285 but upcoming families as well. There is still some development to be done as AMD's Alex Deucher told Phoronix that this initial code lacks power management features for Tonga but that will be addressed shortly.
"At long last the source code to the new AMDGPU driver has been released! This is the new driver needed to support the Radeon R9 285 graphics card along with future GPUs/APUs like Carrizo. Compared to the existing Radeon DRM driver, the new AMDGPU code is needed for AMD's new unified Linux driver strategy whereby the new Catalyst driver will be isolated to being a user-space binary blob with both the full open-source driver and the Catalyst driver using this common AMDGPU kernel driver."
Here is some more Tech News from around the web:
- Memristor could help make brain-like computer @ Nanotechweb
- Qualcomm will reportedly ditch TSMC in favour of Samsung for Snapdragon 820 @ The Inquirer
- BlackBerry buys security startup WatchDox to boost enterprise software offering @ The Inquirer
- Windows 10 MURDERED your Lumia? Microsoft says it may have a fix @ The Register
- How to Run Your Own Git Server @ Linux.com
- D-Link: sorry we're SOHOpeless @ The Register
- MSI OC Academy Sub-Zero Overclocking Event @ Kitguru
- TRENDnet AC1900 Dual Band Wireless Router Review @ NikKTech
- Inateck HBU3VL2-4 USB 3.0 Hub and HBU3VL3-4 Hub with Ethernet @ eTeknix
Subject: General Tech | April 21, 2015 - 07:00 AM | Scott Michaud
Tagged: windows 10, windows, microsoft, amd
The CEO of AMD is an unexpected, but probably very accurate, source when it comes to knowing the Windows 10 release date. First off, the news broke on a quarterly earnings call. When you make a statement on those, you have a strong legal obligation to be telling the truth according to the knowledge that you have at the time. Also, as a major hardware vendor of CPUs and GPUs, her company would have been notified by Microsoft so that they could plan development of graphics drivers and so forth. It also aligns with the “Summer” announcement made last month by Microsoft.
Of course, this led to a flurry of comments that claim three months will not be enough time to bake a successful product. Others, naturally, claim that Microsoft has been developing software for long enough to know that they can finish their product in three months. Still others shrug and say, “Yeah, you both make sense. I'm going to go play some Grand Theft Auto.”
One aspect that I don't see mentioned enough is that Microsoft has multiple projects and teams on the go, and we only see a fraction of what is being done in our Insider branch. Despite the narrative that Microsoft wishes to avoid another Windows 8 fiasco and they want their users to guide development, they have alluded that a major reason for the Insider program is to test their build delivery system. While I am having a bit of a hard time finding the supporting quote, I did find one reference to it being the reason for ISOs being delayed.
And finally – we heard from you loud and clear you want ISO images of the new builds we release. We felt it was important to listen to that and give you what you want – but there’s a catch. Getting the update & install data from our Preview Builds mechanism is super important for us. It helps us ensure smooth ESD distribution, download, and upgrade success for this program going forward, and also will help us ensure great upgrades for people once we release Windows 10. So we’re going to release the ISOs at the same time as we publish to the Slow ring. That means if you want to be FIRST and FASTEST to get the build, you’ll need to use our Preview Builds mechanisms (either automatic or Check Now in PC Settings to download.) If you must have an ISO you’ll have to be a bit more patient. I hope that you’ll consider that a fair tradeoff.
So what is my point? Basically, it is difficult for us to make assumptions about how baked Windows 10 is from our standpoint. They are being more open with us than ever about their development methods, but we don't know certain key things. We don't know what final feature set they plan. We don't know how much work has been done on any individual feature since it was merged into a build that we saw. We also don't know how much has been done by third parties. In some cases, a release in three months could equate to like, six months of work for a specific team since their last contribution was merged. I do think that any major feature we see at BUILD will pretty much be the last additions to the OS before it launches though, unless they have a surprise that will surface at E3 or something.
Also, remember that the things they show us are slanted to what they want feedback about.